Wafer Processing

WAFER PROCESSING ARTICLES



Wafer Bonder for CMOS Image Sensors

09/16/2008  In response to market needs for 300mm process equipment capabilities to demonstrate 3D processes, SUSS MicroTec has introduced The XBC300. The XBC300 is designed for 3D integration and 3D packaging with through silicon vias (TSVs) and is ideal for the CMOS image sensor (CIS) early adopter market.

3D Technology and Beyond: 3D All Silicon System Module

09/16/2008  Georgia Institute of Technology
There is a need for miniaturization at the IC, module, and system levels. There is stil research and development required to bring this hetero-integration technology to cost-effective implementation with required reliability and performance needs. In addition to the module level, we must focus on performance, form factor, cost, and reliability of the entire system.

Advanced Diamond Technologies' All-Diamond AFM Probes now available

09/10/2008  September 10, 2008: Advanced Diamond Technologies (ADT) announces the immediate availability of NaDiaProbes all-diamond atomic force microscopy (AFM) probes, claiming they have 30× the price performance of industry-standard silicon nitride (SiN) probes.

Elpida: China DRAM move is final turf battle

09/02/2008  Elpida's recently unveiled plan to create a $5B DRAM JV in China's Jiangsu Province is the final stage in an industry "turf war" with the ultimate prize being simply survival, according to CEO Yukio Sakamoto, in an interview with Japan's Nikkei daily paper.

Chip sales climb on consumer demand

09/02/2008  Worldwide semiconductor sales have picked up a little, thanks to continued strong demand for consumer electronics, PCs, and cell phones, and despite continuing softness in the memory sector, according to the latest data from the Semiconductor Industry Association.

Wafer Bond Cluster Tool

09/01/2008  Designed for advanced MEMS manufacturing and 3D wafer bonding, the CBC200 from SUSS MicroTec is a fully-automated, wafer bond cluster with up to 90 kN bond force and 600°C thermal capacity. These features are said to enable die size and cost reduction for MEMS devices. Additional features include post-bond alignment accuracy for metallic bonds to 1.25µm and cluster design concept and software for 24/7 production.

Pac Tech Announces Grand Opening and Technical Symposium

09/01/2008  In celebration of its new 55,000 sq.ft. wafer bumping and back-end processing facility in Penang, Malasia, Pac Tech Packaging Technologies is planning a grand opening ceremony and technical symposium on September 18 and 19, 2008, respectively. The festivities are intended to bring attendees up to date on all facility's capabilities, and inform them on new developments in packaging technology.

Optimize semiconductor HVAC filtration through evaluation

09/01/2008  Chemical air filtration combined with on-site analytical evaluation of filtered area and filter solution provides cost reduction by optimizing filter lifetime.

STATS ChipPAC and Infineon Sign Second Agreement on eWLB Technology

08/31/2008  STATS ChipPAC Ltd. and Infineon Technologies have signed a second agreement in which STATS ChipPAC will provide manufacturing services for products based on Infineon's first generation embedded wafer-level ball grid array (eWLB) technology. This agreement between the two companies comes closely follows the Aug. 7 release announcing an agreement between Infineon, STMicroelectronics and STATS ChipPAC on joint development of next generation eWLB technology.

Bright future for LSA at 32nm and beyond

08/28/2008  USJ formation at 32nm was the focus of the West Coast Junction Technology Group's meeting at SEMICON West, but also discussed was what lies ahead at the 22nm node. Ultratech execs provide additional insight to SST about the company's WCJTG talk on laser spike annealing.

SUSS MicroTec uncrates wafer bonders for advanced MEMS

08/27/2008  August 27, 2008: SUSS MicroTec, a supplier of process and test solutions for the semiconductor industry, announced the CB Series semi- and fully automated wafer bonders, for advanced MEMS devices used in automotive and consumer applications.

Intel's take on the HDD vs. SSD debate

08/22/2008  The relative merits of solid-state drives (SSD) vs. hard-disk drives (HDD) have been discussed for some time -- and now Intel is joining the debate, outlining plans for the SATA SSD product family at its annual Developer Forum (8/19-8/21). Troy Winslow, marketing manager of the NAND products groups at Intel, told SST what SSDs offer in terms of enhanced mobility and energy cost savings.

First issue for 450mm: Making 22nm-quality wafers is no slam dunk

08/19/2008  The debate continues to rage over the economics of a 450mm wafer-size transition, but those actually working on developing the new wafers report significant and troubling problems in producing the bigger substrates to meet purity and smoothness demanded by 22nm-generation devices and beyond.

Phoenix microscope takes first image of Martian dust particle

08/19/2008  August 19, 2008 -- NASA's Phoenix Mars Lander has taken the first-ever image of a single particle of Mars' ubiquitous dust, using its atomic force microscope.

SEMI: Wafer shipments back on track in 2Q08

08/18/2008  Worldwide silicon wafer demand area shipments had been sluggish in previous quarters, but picked back up in 2Q08 to typical seasonal levels, according to data from SEMI's Silicon Manufacturers Group (SMG).

Wafer Backside Coating

08/18/2008  Using stencil, screen printing, and spin coating techniques, Henkel's Ablestik 8000 series, wafer backside coating (WBC) reportedly enables the deposition of die-attach materials to the wafer backside down to a thickness of 20 µm on wafers as thin as 100 20 µm and up to 300 mm in diameter. Unlike conventional dispensing methods, printing or spin coating materials onto the wafer is said to deliver a tightly controlled, high UPH for high-volume die attach adhesive deposition.

SiGen Supplies REC with thin-pv substrate samples and "kerf-free" wafering equipment

08/14/2008  August 12, 2008 -- Silicon Genesis Corporation (SiGen) has signed a collaboration and equipment supply agreement with Renewable Energy Corporation (REC) where REC will evaluate thin-PV substrate samples made using SiGen's PolyMax "kerf-free" wafering process. REC will also collaborate with SiGen to develop and optimize high-volume manufacturing (HVM) equipment and develop silicon ingot shaping requirements.

Scientists tout flexible silicon-based "eye"

08/07/2008  Researchers created a hemispherical "eye" camera using an array of single-crystalline silicon detectors and electronics in a stretchable, interconnected mesh, an achievement they say points the way toward advanced camera designs.

STMicroelectronics, STATSChip PAC, and Infineon Join Forces in Next-gen WLP Development

08/07/2008  STMicroelectronics, STATS ChipPAC, and Infineon Technologies AG have signed an agreement to jointly develop the next-generation of embedded wafer-level ball grid array (eWLB) technology, based on Infineon's first-generation technology, for use in manufacturing future-generation semiconductor packages.

Analyst: DRAM oversupplies tipping into 2009

08/05/2008  Despite a mild recovery in 2Q08, global DRAM makers are once again building inventories and pulling the rug out from prices, and the buildup will likely push out a full market recovery until the end of next year, according to a new warning by iSuppli.




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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