3D Integration

3D INTEGRATION ARTICLES



Applied Materials enables cost-effective vertical integration of 3D chips

05/28/2014  Applied Materials, Inc. today introduced the Endura Ventura PVD system that helps customers reduce the cost of fabricating smaller, lower power, high-performance integrated 3D chips.

Ziptronix and EV Group demonstrate submicron accuracies for wafer-to-wafer hybrid bonding

05/27/2014  ­ Ziptronix Inc. and EV Group today announced they have successfully achieved submicron post-bond alignment accuracy on customer-provided 300mm DRAM wafers.

SPTS Technologies announces the Omega Rapier XE System for 300mm wafer silicon etch processing

05/22/2014  SPTS Technologies, a supplier of advanced wafer processing solutions for the global semiconductor industry and related markets, today announced the launch of its Rapier XE system for 300mm wafer silicon etching.

Slideshow: What to look for at IITC 2014

05/20/2014  The 17th annual IITC will be held May 21 – 23, 2014 in conjunction with the 31st AMC at the Doubletree Hotel in San Jose, California.

New materials and processes for advanced interconnects

05/16/2014  Although on-chip interconnects have not been scaling at the same speed as other parts of the chip, new capabilities enabled by graphene and CNTs, among other materials, could soon change that.

SRC and UC Berkeley pursue more cost-effective approach to 3D chip integration

05/07/2014  University of California, Berkeley researchers sponsored by Semiconductor Research Corporation (SRC) are pursuing a novel approach to 3D device integration that promises to lead to advanced mobile devices and wearable electronics featuring increased functionality in more low-profile packages.

Ziptronix licenses ZiBond to IO Semiconductor for RF applications

04/30/2014  Ziptronix Inc., a provider of patented, low-temperature direct bonding technology for 3D integration, today announced a limited exclusive patent licensing agreement with IO Semiconductor (IOsemi) for application of its ZiBond technology for use in RF front-end devices for consumer mobile products.

STS Semiconductor and Invensas to partner on high volume bond via array mobile solutions

04/22/2014  Tessera Technologies, Inc. announced today that Invensas Corporation and South Korea-based STS Semiconductor & Telecommunications, a semiconductor assembly and test solution provider, have entered into an agreement to validate high volume manufacturing capability for Invensas' Bond Via Array (BVATM) technology for next generation smartphone and tablet customers.

In the permanent bonding market, EV Group is leading, Applied Materials and Tokyo Electron are merging

04/18/2014  Permanent bonding technology is a key process for a wide range of applications in the semiconductor industry such as MEMS, advanced packaging, LED devices, and SOI substrate applications.

Highlights from the IMAPS Device Packaging Conference

03/24/2014  The annual IMAPS Device Packaging Conference in Ft McDowell AZ is always a source for the latest packaging information.

3D EDA brings together proven 2D solutions

03/14/2014  With anticipated economic limits to the continuation of Moore’s Law now on the horizon, it seems that moving into the 3rd dimension (3D) by stacking multiple layers of integrated circuits (IC) will be the ultimate expression of CMOS technology.

Plug-and-play test strategy for 3D ICs

03/11/2014  Three-dimensional (3D) ICs, chips assembled from multiple vertically stacked die, are coming. They offer better performance, reduced power, and improved yield.

North American semiconductor equipment industry posts January 2014 book-to-bill ratio of 1.04

02/21/2014  A book-to-bill of 1.04 means that $104 worth of orders were received for every $100 of product billed for the month.

SMIC and JCET establish joint venture for 12 inch bumping and testing

02/21/2014  Semiconductor Manufacturing International Corporation, China's largest and most advanced semiconductor foundry, and Jiangsu Changjiang Electronics Technology Co., Ltd., the largest packaging service provider in China, jointly announced today a joint venture for 12" bumping and related testing.

EV Group unveils high-volume manufacturing photoresist processing system

02/11/2014  EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today unveiled its most advanced 300-mm photoresist processing system for logic and memory high-volume manufacturing.

The 2014 European 2.5/3DIC Summit

02/06/2014  SEMI’s second annual European 3D TSV Summit was held in Grenoble in late January. Three hundred and twenty attendees met to discuss the status of 2.5/3DIC and other advanced packaging technologies.

Paradigm shift: Semi equipment tells the future

01/27/2014  Looking at the semi-equipment booking should be the first step in any attempt to assess future semiconductor trends.

2014 Outlook: An era of unprecedented change

01/24/2014  We asked leading industry experts and analysts to give us their perspectives on what we can expect in 2014.

Substrate impact on 2.5/3D IC costs

01/23/2014  At the recent Georgia Tech Global Interposer Technology (GIT) Workshop in Atlanta, the pervasive theme appeared to be whether a change in substrate is required to lower overall costs and help drive HVM (high volume manufacturing) applications.

A bilayer temporary bonding solution for 3D-IC TSV fabrication

01/23/2014  New technology eliminates the need for specialized equipment for wafer pre- or post-treatment.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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