3D Integration

3D INTEGRATION ARTICLES


Nanya implements 3D IC TSV technology for DDR3, future DDR4 devices

07/27/2012 

Dr. Phil Garrou, contributing editor, shares Nanya Technology
3D TSV Summit planned for European semiconductor industry

07/25/2012 

SEMI Europe will host a new event, the European 3D TSV Summit, January 22-23, 2013 in Grenoble, France. This inaugural meeting will revolve around the theme: "On the Road towards TSV Manufacturing," denoting how device designers and manufacturers are crossing from 2D packaging to 3D for more functionality in a smaller form factor.
STATS ChipPAC adds director with experience from Intel to Zarlink

07/25/2012 

STATS ChipPAC appointed Gary Tanner as a member to its Board of Directors. Tanner brings experience from Zarlink Semiconductor, Intel, Texas Instruments, and other semiconductor companies.
New MEMS, 3D IC packaging working group chairs at GSA

07/24/2012 

Global Semiconductor Alliance (GSA) recently named Jay Esfandyari, STMicroelectronics, as its MEMS Working Group chairman and Ken Potts, Cadence Design Systems, as the 3D IC Working Group chairman.
3D TSV packages outgrow semiconductor industry by 10X

07/19/2012 

3D TSV chips will represent 9% of the total semiconductors value in 2017, according to Yole D
Ziptronix wafer bonding technology adopted for high-volume cellphone component

07/17/2012 

Ziptronix Inc., which develops direct bonding technology for advanced semiconductor applications, has licensed its technology for a high-volume cellular handset application.
2012 ITRS update: Back-end packaging and MEMS

07/13/2012 

At SEMICON West, the working groups of the International Technology Roadmap for Semiconductors (ITRS) outlined 2012 updates to the roadmap. Check out the back-end process info here.
Roadmapping More than Moore: When the application matters

07/13/2012 

At the ITRS 2012 update, back-end technologies session, at SEMICON West, roadmapping for More than Moore was addressed as both a philosophical and technical matter.
Fabless keynote: Xilinx on programmability @ SEMICON West

07/12/2012 

SEMICON West’s Day 2 keynote speaker represented a fabless company: Ivo Bolsens, PhD, SVP and CTO of Xilinx presented on how programmable chips and innovative packaging can advance semiconductors.
Interviews with CEA-Leti researchers at SEMICON West

07/12/2012 

CEA-Leti presented research updates alongside SEMICON West this week. After the talks on device architecture, 3D and 2.5 packaging interconnects, large-scale computing and power consumption, and more, CEA-Leti’s researchers joined Solid State Technology to talk about their fields of interest.
Chat with Intel’s Shekhar Borkar @ SEMICON West 2012: Overpowering power consumption

07/11/2012 

In this video interview, Intel's Shekhar Borkar shares some key topics from SEMICON West keynote: Near-threshold voltage transistor designs, 3D integration for DRAM, unconventional interconnect, and more.
EVG's wafer bonder passes SEMATECH/ISMI 3D integration tool assessment

07/11/2012 

SEMATECH qualified EVG's GEMINI automated wafer bonding system through its Equipment Maturity Assessment implemented within SEMATECH's 3D Interconnect program and ISMI's EMA team.
Semicon West Day 1: FDSOI and TSV R&D with CEA-Leti

07/11/2012 

Michael A. Fury, Ph.D., reports on the opening day of SEMICON West (July 10), covering exaflop computing, FDSOI, TSV and other integration schemes, and silicon photonics with CEA-Leti.
Imec at SEMICON West: Interview with Luc Van den hove

07/10/2012 

Luc Van den hove, president and CEO, imec, spoke with Solid State Technology, covering imec’s major announcements and research presentations to take place during SEMICON West 2012.
STATS ChipPAC ramps advanced flip chips to HVM, adds TCB processing capability

07/10/2012 

STATS ChipPAC brought its fcCuBE advanced flip chip semiconductor packaging technology with copper column bumps, bond-on-lead interconnection, and enhanced assembly processes into high-volume manufacturing for multiple customers.
Top conference reports from H1 2012

07/06/2012 

We at Solid State Technology have compiled the best conference reports so far this year, in the lead up to SEMICON West 2012, next week in San Francisco.
Xilinx boosts silicon and electronics engineering in Ireland

07/05/2012 

Xilinx will invest $50 million to expand its electronics engineering operations, located at the company
Tessera: Adding Vista Point Technologies, losing Powertech Technology?

07/02/2012 

Tessera received notice from Powertech Technology Inc. (PTI) that it will terminate its license agreement with the semiconductor packaging and optics technology company. Tessera also completed phase 1 of its acquisition of camera module technologies from Flextronics.
Unisem focuses new business model on Tier-1 customers and high-value technologies

06/29/2012 

UNISEM relaunched its business model with the name

Ultratech acquires IBM patents for semiconductor packaging processes

06/29/2012 

Ultratech acquired IBM patents on semiconductor packaging technologies, including C4 bumping, ball grid array (BGA) methods, lead-free solders, and 3D packaging.



WEBCASTS


Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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