(June 19, 2007) MATERIALS PARK, OH — ASM International released its MEMS Materials Database: Packaging Module, a licensed database containing mechanical, physical, processing, and component data for materials selection in MEMS packaging. The database targets improvements to time-to-market, reliability, and design and manufacturing of MEMS devices.
Category Archives: Materials and Equipment
Targeting the MEMS and nanotechnology industries, the IntelliSuite v8.2 software tool for MEMS/nano-device development includes nanostructure design tools to enable carbon nanotube (CNT) and nano-structure use in computing, display, medical, sensor, and related devices.
(June 14, 2007) TROY, NY — As part of research designed to manufacture carbon nanotubes (CNTs) as viable replacements for copper in 3D die-stacking applications, researchers at Rensselaer Polytechnic Institute have implemented a method for compacting CNTs into bundles, enabling better thermal and electrical conductivity. Densification occurs post-growth, allowing scientists to use a known, conventional CNT growth process. CNT density was increased 525× in the experiments. James Jiam-Qiang Lu, associate professor of physics and electrical engineering, led the R&D.
June 11, 2007 – Mentor Graphics has acquired Sierra Design Automation for $90 million in a half-and-half cash/stock deal, bolstering its design offerings. Mentor says the deal will be “slightly accretive” for FY07 (ending Jan.31 2008), and shave about $0.02 off of its anticipated FY08 earnings.
Sierra’s flagship product is Olympus-SoC, a place-and-route system targeting 65nm and 45nm process technologies, which embeds variation-aware timing, optimization, and litho modeling to address OPC and RET effects early in the design cycle, according to the company.
“Our leading-edge customers are telling us that they need a design-to-fab flow capable of handling dozens of process corners and multiple modes, all while addressing manufacturability challenges to achieve manufacturing closure of their designs,” said Wally Rhines, CEO/chairman of Mentor Graphics, in a statement. “The acquisition of Sierra expands Mentor’s leadership in DFM, and provides the integration that customers need between physical design, and back-end verification and yield-enhancement.”
“At 65 and 45 nanometers (nm), discontinuities such as process variation, design size, low power and DFM are creating a major disruption in physical design,” stated Sierra president/CEO Pravin Madhani. The merger with Mentor enables us to deliver a powerful design-to-fab flow that addresses these discontinuities in a comprehensive fashion.”
STMicroelectronics has been working with both firms for about 18 months to address “critical discontinuities” in the design flow, including low-power, design for variability and manufacturing, noted Philippe Magarshack, group VP and central CAD GM for ST. “We are very impressed with the quality of the results of this partnership, which allows us to blend manufacturability know-how into the physical synthesis and routing phase.”
Engineers from Stanford and the U. of Southern California have devised a method to design circuits containing carbon nanotubes (CNTs) that should work even when many of the nanotubes are twisted and misaligned.
The work is based on the assumption that with transistors made out of CNTs, invariably some of them will be askew and not work properly. “You want to create transistors out of these things, and hook up these transistors and make them turn on and off independently. But if twisted carbon nanotubes, for example, short out the circuit, you lose the opportunity to do that,” noted Subhasish Mitra, assistant prof. of electrical engineering and computer science at Stanford, in a statement.
Instead, the scientist say they can show how to design chips that will work regardless of the orientation of its CNTs. Starting with a NAND gate (a single circuit element in which nanotube layout is insignificant, they came up with an algorithm that they claim “guarantees” a working design for any circuit element even when “a large number” of CNTs are misaligned — and moreover, with insignificant tradeoffs in cost, speed, or power consumption, they note, adding that their next step is to build and test real circuit elements based on the algorithm.
The key, they say, is modeling the circuit into a fine grid, so that engineers can determine which grid squares the CNTs must pass through and which they shouldn’t, in order to make a design work correctly. CNTs in the so-called “illegal” regions can be etched away or otherwise rendered electrically irrelevant. The Stanford algorithm then automatically determines where these regions should be laid out in the design of a circuit element with a particular function, essentially making them immune to these “illegal” effects. The algorithm can’t guarantee, however, whether a CNT will make a desired connection, the researchers note, adding that CNTs also are hard to predict whether they will conduct electricity instead of switching on and off.
June 8, 2007 – Intel Corp. appears to be pushing out all orders and shipments for equipment relating to the upgrade of its fab in New Mexico from 200mm to 300mm-compatible, just three months after announcing it would make that facility into its fourth 45nm production site, according to an analyst report.
Citigroup’s Tim Arcuri indicates that Intel’s pushouts, part of an effort to cut 2007 capex by 10% or more, have moved beyond lithography tools into the process flow, and are extending out about one quarter. The moves primarily impact vendors including Applied Materials, Novellus Systems, KLA-Tencor, and Varian Semi. Equip., he noted.
Back in February Intel said it would spend $1.0-$1.5 billion
June 7, 2007 — InvenSense, Inc., provider of integrated motion sensing solutions for mobile applications, has released its IDG-1004, which the company says is “the world’s smallest and lowest cost dual-axis gyroscope” for the GPS portable navigation device (PND) market. The IDG-1004 enables dead reckoning (DR) to enable navigation where GPS cannot operate. In addition, it promises better map matching capability by measuring the direction of the vehicle with one axis, while providing better distance accuracy by measuring slope as the vehicle travels up and down hills or in rough terrain using the second axis. The second axis of the gyroscope also reportedly allows drivers easier installation by compensating for the angle at which the PND may be installed. (Arbitrary mounting with a single axis gyroscope frequently results in lower accuracy.) Furthermore, the IDG-1004’s X-axis and Y-axis sensing ability enables in-plane mounting on the main PND circuit board. Competing single-axis gyroscopes typically require a daughter board to be mounted perpendicular to the main PND circuit board since they measure only the Z-axis plane. “Sales of portable navigation devices are expected to top 25 million units worldwide in 2007,” said Richard Robinson, principal analyst, automotive electronics, with the market-research firm iSuppli Corp., El Segundo, Calif. “Enhancing location and direction accuracy to the levels of more expensive in-vehicle systems will be one of the next main goals of PND makers.” (June 5, 2007) SAN DIEGO — Since carbon nanotubes (CNTs) tend to grow with erratic kinks and bends in the tube structure, a group of engineers from Stanford University has devised circuit-simulation algorithms that eliminate bad connections caused by errant CNTs. The work, which involves fine grids rather that direct interconnects, is being presented at the Design Automation Conference (DAC), June 48 in San Diego. June 5, 2007 — GenISys GmbH, a German provider of software for optimization of microstructure fabrication processes, has formed a technology development partnership with JEOL, Ltd., and Cornell University’s Nanoscale Science and Technology Facility. The three organizations are collaborating to develop advanced solutions for direct write e-beam data preparation and electron process correction (nano-EPC) technologies for nanometer-range structures. Each organization is leveraging its strengths within the partnership. Working with JEOL, GenISys is optimizing its high-performance Layout BEAMER data preparation and PEC software to maximize performance on JEOL’s high-end e-beam lithography systems. The Cornell Nanoscale Science and Technology Facility is providing guidance on both implementation and development strategies, leveraging its work on nanostructures used in microelectronics, optics, biomedical applications, and other functions. Work on the three-party agreement has been in progress for about six months, with a focus on structures of some 10 nanometers or less. Because these structures are fabricated with only a few pulses of the electron beam writer, they require unprecedented uniformity, consistency, and placement. Findings of the Cornell-JEOL collaboration have already enabled upgrades of the GenISys software Layout BEAMER, which now includes an algorithm that corrects printing artifacts of this discrete writing grid. Future versions will be able to account for additional machine and process effects. “The users of e-beam direct write need urgent solutions for advanced data preparation and correction for nanostructure applications. The strong cooperation of the equipment vendor, the user, and the software vendor is key for these developments,” said Ulrich Hofmann, founder and general manager of GenISys. “These organizations are pioneering the state of the art in nano-fabrication.” June 4, 2007 – GenISys GmbH, JEOL Ltd., and Cornell U. are partnering to develop advanced technologies for direct-write e-beam data preparation and electron process correction technologies for nanometer-range structures. Under the partnership, GenISys will optimize its Layout Beamer data prep and PEC software for JEOL’s high-end e-beam litho systems. Cornell’s Nanoscale Science and Technology Facility will provide guidance for both implementation and development strategies. The group says work has been in progress for six months focusing on 10nm-or less structures, which are fabricated with a few pulses of the e-beam writer. Results of the work have led to upgrading the GenISys software with an algorithm to correct printing artifacts of the discrete writing grid, and future versions will account for additional machine and process effects. “Users of e-beam direct write need urgent solutions for advanced data preparation and correction for nanostructure applications,” said Ulrich Hofmann, founder and general manager of GenISys, in a statement. “These organizations are pioneering the state of the art in nano-fabrication and provide the ideal forum for further development and extension of Layout Beamer. The high flexibility, responsiveness and unique combination of software and e-beam application knowledge will enable GenISys to deliver the solutions the market is waiting for.” “With more than 700 users coming to our facility annually, we do a vast amount of e-beam data preparation, and this collaboration will help us provide better service and results, as well as learn more about the future of the process,” added Rob Ilic, research associate and user program manager of Cornell’s Nanoscale Science and Technology Facility.Post navigation