Category Archives: Metrology

August 6, 2007 – Nanometrics Inc. has appointed Timothy Stultz, former president/CEO of Imago Scientific Instruments, as its new CEO, taking over for Bruce Rhine who held the spot since March and move to the position of chairman, in a culmination of moves in what the company admits has been a year of “challenges.”

Stultz, who had led Imago since June 2003, also was VP and GM with Veeco Instruments from 1994-1999, and founder/CEO of Peak Systems Inc., a developer of rapid thermal processing equipment. In between those stints and Imago he served as president/CEO for ThauMDx, a provider of diagnostics systems for bio/chem applications.

In a statement, Rhine hinted at the company’s recent activities and shakeups which apparently haven’t gone as smoothly as hoped, areas Stultz will presumably address as he attempts to “implement business processes to focus on profitability, cash flow and predictability.” Nanometrics founder Vincent Coates noted that Rhine “has guided Nanometrics through some of the most challenging tasks we have faced as a company,” most notably “turning around a troubled business integration,” and Rhine himself remarked on “a number of challenges in integrating and consolidating its operations worldwide.”

It’s been a tumultuous year for Nanometrics, with a number of executive shuffles, selling off certain product assets, and moving other product lines overseas. Since last summer’s acquisition of metrology firms Soluris Inc. and Accent Optical Technologies (AOI), the firm has watched former CEO John Heaton leave the company with little explanation, followed a month later by CFO Dave McCutcheon “to pursue other interests”. More recently Nanometrics has announced it will consolidate all its overlay metrology production in Korea (and close the Soluris site in Concord, MA), where it already makes its Orion and Caliper systems. And weeks ago Nanometrics sold off the Yosemite CD-SEM technology originally developed by Soluris and AOI’s DiVA series of IV instruments primarily for use in the RF microwave industry, both for undisclosed amounts.

In video interviews at SEMICON West, Dave Gross of AMD pleads AMD’s case for collaboration to maximize the effectiveness of R&D dollars. Alain Diebold (U. at Albany) summarizes unresolved metrology issues at 45nm and discusses the future at 32nm. And John Allgair (ISMI assignee from AMD) outlines the group’s current plans as it gears up for a larger presence in Albany and expand its metrology program — look for intentional defect array wafers to be ready for mass production in 2-3 months.

Dave Gross, director, global manufacturing systems technology, 300mm engineering, AMD
– CLICK HERE for the 300kbps version
– CLICK HERE for the 100kbps version

– (SEE ALSO: SEMICON WEST REPORT: Do lean principles apply to semi manufacturing?)


Alain Diebold, Empire Innovation Professor of Nanoscale Science, College of Nanoscale Science and Engineering, U. at Albany
– CLICK HERE for the 300kbps version
– CLICK HERE for the 100kbps version


John Allgair, metrology program manager, AMD assignee to the International SEMATECH Manufacturing Initiative (ISMI)
– CLICK HERE for the 300kbps version
– CLICK HERE for the 100kbps version


– More “SST on the Scene” video interviews from SEMICON West…

by Ed Korczynski, Senior Technical Editor

With High-k (HK) dielectrics and metal-gates (MG) now being ramped into CMOS production at Intel and IBM, much of the excitement at this year’s SEMICON West centered around manufacturing technologies needed for these new materials. Much of the discussions in equipment supplier-sponsored seminars and panels centered on the challenges of working with these new materials — particularly the tricky setup of affordable in-line metrology for these new ultra-thin materials.

by Ed Korczynski, senior technical editor, Solid State Technology

Spectroscopic reflectometers (SR) and ellipsometers (SE) provide thickness and composition information for thin dielectric films. As the industry has moved to ever thinner films, there is less material to refract light and SE signals drop off. Metrosol, one of last year’s SEMICON West Technology Innovation Showcase winners, is now ready to make a splash, providing vacuum-ultraviolet (VUV) SR tools that can resolve information from extremely thin films.

The company’s big launch at SEMICON West “is only half of our launch,” said CEO Kevin Fahey, in an interview with WaferNEWS. “Customers are used to new technology being first used in R&D. Even though we’re a new technology, we’re designed for high-volume production and we’re moving down the commercial path with several tier-1 guys.”

The two immediate applications for VUV metrology down to 120nm are high-k dielectrics for both gates and memory-storage. “Once you understand the optical properties, you can expect to see significant differences in even 10-Angstrom films,” claimed Fahey, who was brought on earlier this year from FEI Co.

“New technology always allows for new use cases. If you look at what we’re able to do by working with VUV, in the wavelength range below 190nm all the dielectric materials have their peaks in the absorption curve,” explained Dale Harrison, CTO and co-founder of Metrosol. “Since we can tell where the peaks are, in a single-measurement we can resolve both composition and thickness.”

A typical SE covers the 1-5 eV energy range, while just the 120-190nm range covers 5-10 eV. “If you convert wavelengths into electron volts, you’ll see that we’re doubling the information space,” explained Harrison. [However, some broadband SEs now resolve down to 150nm. — EDIT 7/27/2007]

“In the VUV, you’re working in a range where a change in composition changes both n and k so we can decouple thickness from composition,” explained Fahey. “If you go to short-enough wavelengths, everything is absorbing.”

The tool needs to use reflective optics, and vacuum with different atmospheres, since quartz lens elements are not transparent below 190nm. The overall hardware design is based on the Asyst EFEM modular architecture. Throughput for one chamber may be ~25 wafers/hr, and up to a total of five chambers can be used. Hot-swap capability for chambers is planned by 2Q08 to aid in overall system uptime. The first five beta units of the fully-automated system will be ready this September. Two manually-loaded chambers have been in use for over two years at customers, one for hafnium-silicon-oxide films and one for nanoimprint lithography (NIL) characterization.

Compared to other production metrology systems for hafnium-silicon-oxide high-k gate dielectrics, the purchase cost is claimed to be one-half to two-thirds that of an x-ray or extended range ellipsometer tool, and typical throughputs are 2&#215-10&#215 of such systems. Reliability data from three years of running the basic chamber show good MTBF and reasonable PM schedules. –E.K.

July 19, 2007 – Advanced Metrology Systems (AMS, formerly Philips AMS) has released three new metrology tools this week, offering model-based infrared (MBIR) metrology for 3D DRAM structures, and a surface wave system for multilayer measurements of copper/low-k films stacks.

The IR 3100N, a follow-up to the 3100 series released earlier this year, uses an extended near infrared (NIR) measurement for online, highly automated measurements of shallow recess structures on product wafers with 70nm and below process technologies. The IR 3100S incorporates a proprietary optical measurement system to achieve spot size of <70 x 70 microns, allowing product chemometrics such as BPSG monitoring as well as increased resolution for 3D etch structures, the company says.

Also unveiled this week is AMS’ SW3300A, a “significant improvement” to the company’s SurfaceWave family, which uses proprietary multi-acoustic wavelength data collection and multiple acoustic parameter algorithms to provide multilayer measurements of copper/low-k interconnect structures. “The ability to measure at multiple acoustic wavelengths coupled with our fourth generation multiple parameter models enables us to now measure multiple layer properties,” noted Tony Bonanno, AMS director of product development, in a statement.

July 18, 2007 – Applied Materials Inc. today released its Applied Producer ACE SACVD system, which helps extend 193nm lithography using self-aligned double patterning (SADP) schemes. The ACE system reportedly delivers a highly conformal oxide spacer film with greater than 95% step coverage, <5% pattern loading and <1% nonuniformity for critical dimension control.

Combined with a benchmark throughput of >80 wafers/hr and a low thermal budget, the ACE system offers the industry’s most productive and extendible spacer solution for SADP at the 32nm node and beyond.

“Lithography is struggling to keep pace with the demand for higher memory storage densities; SADP technology enables a doubling of pattern densities using current litho schemes, making it the preferred solution for 32nm and beyond,” said Hichem M’Saad, VP and GM of Applied Materials’ Dielectric Systems and CMP Business Group.

The performance of Applied’s ACE technology has been validated at Applied’s Maydan Technology Center. An advanced TANOS flash memory structure was fabricated using an advanced SADP technique. The structure was successfully optimized using Applied’s Producer CVD, Centura AdvantEdge G3 Etch and VeritySEM metrology systems.

by James Montgomery, News Editor, Solid State Technology

Days before Semicon West, WaferNEWS caught up with Christopher Moore, president/CEO of Advanced Metrology Systems (AMS), nee Philips AMS, to chat about how life is different nine months after taking the private equity route.

The first thing he pointed out is the need to understand the difference between private equity (PE) and venture capital (VC) investments, and why the former was the right play for AMS. While VCs primarily seek out investments with a clear goal of a quick and bountiful return, “private equity’s long-term goal is to grow the business, and they have the patience to let us do that,” recognizing that in the semiconductor industry development-to-production timelines can be two years or more. Former parent Philips also showed patience with the business, he added, but it was always clear (and uneasily so among customers) that AMS wasn’t in the European firm’s long-term core plans.

Moore also indicated that the increasing presence of private equity circling the semiconductor industry looking for deals has changed many companies’ outlooks about their potential exit strategies, particularly in the crowded metrology space. “Before I got into this business, I would have said we’re going to be sold to a bigger player, or go IPO,” he told WaferNEWS, “but now I’m beginning to believe more and more that the exit strategy in this type of business is another private equity round.” Even the sector’s biggest players, which in the past have proven to be consolidators vs. consolidatees, might not be immune to PE interest — “anybody would be much smaller than the deal done with Chrysler, if someone seriously wanted to take a run at them,” Moore pointed out (referring to this May’s $7.4 billion deal for Daimler-Benz selling an 80% stake in the US automaker to Cerberus Capital Management). “If there’s a good opportunity, then there’s private equity willing to do it, whether it’s in semiconductors or something else.”

In addition to a change in exit strategy, Moore also has had a change-of-heart about the well-accepted belief in building “critical mass” to compete in an industry segment. “I subscribed to that for a long time,” he said, noting that in any commodity market critical mass is perhaps the most important strategy to compete. But semiconductor equipment, and particularly metrology, he pointed out, is a specialists’ arena, with application-specific systems and tools geared to do certain things, so critical mass is less important than leveraging specific knowledge. “If you can find a market, not $200 million but maybe $30-$50 million market, that’s a good business if you can string some of them together […] and support tools for those specific applications with specific knowledge.”

AMS’ business is chugging along, expected to repeat the 50% business growth enjoyed last year, even though Moore said he didn’t expect the market’s softness to extend into 2Q07 (>50% of AMS’ business is in DRAM, which has been pummeled so far this year). As a buffer the company now has 10%-15% of its business in power devices, up from zero in 2006. Explaining the differences required to do business in those fields, Moore explained that DRAM lends itself well to consortia efforts, where there’s a universal approach among partners early in the process, although there will be some tweaks and nuances to transfer technologies to the fab levels. Power, though, is largely a collection of individual companies, and much more of a mix of capacity investments vs. technology buys, he noted.

Looking ahead to SEMICON West, Moore is particularly interested in learning what people are thinking about 3D structures, and of course the metrology for chipmakers that are using the third dimension “to actually build things instead of just putting layers on.” He also revealed that there’s been a lot of “serious, pilot-process work” going on behind the scenes in finFETs, and many may not realize just how far this technology has come — he indicated AMS is working two customers (from different industry consortia) who expect to have the capability to put finFETs in production next year, suggesting the 45nm node. “Given what we’ve seen, it’s not ‘yeah we’ll do it at 45nm,’ not a fait accompli,” he told WaferNEWS, “but it certainly looks like it’s doable.” — J.M.

by Ed Korczynski, Senior Technical Editor

KLA-Tencor’s Surfscan SP2XP, released earlier this year, was initially release to inspect defects on bare wafers. Now the SURFmonitor haze analysis capability has added new image processing algorithms to allow for applications in IC manufacturing. SURFmonitor is an add-on option to either a SP2 or SP2XP darkfield/brightfield laser scattering surface inspection system.

Since any of the >300 sold SP2-family tools can scan an entire 300mm wafer surface in <1 minute, and since image processing is done by separate dedicated boxes to not impede throughput, there are ubiquitous applications throughout a fab to surf the haze and glean productive information from wafers.

A SURFimage file shows a wafer map with grayscale information for haze. In certain obvious cases, a characteristic signature may be seen in the haze map that indicates the root cause of a problem. For example, radially symmetric defects often track to a wafer chuck (see Fig. 1, above), while arcing scratches tend to originate with CMP steps, and some repeating defects may line-up with lithographic stepper shot positions. In such cases the raw SURFimage may be sufficient to point to the problem, but in other cases the signal of interest is still a bit lost in the noise. Streaks of chemical residues from a wet clean tool may be present on a wafer but difficult to resolve without further image processing (see Fig. 2, below).

To efficiently convert the image of a haze map into the “productive” information of a root-cause diagnosis, image filtering and processing is done by a SURFengine image computer located next to the SP2 tool, which recognizes and extracts the defects of interest, generate alarms, sorts and filters defects by type, and passes this information on to a yield management system for SPC charting and further troubleshooting. The SURFengine boxes in the fab are networked together using a remote SURFstation, for engineering analysis, access to x/y coordinates for DR-SEM and troubleshooting, and recipe writing. The raw haze maps are archived in the SURFengine for up to one year, allowing for retroactive data mining and trend tracking.

KLA-Tencor is positioning this new capability as a hybrid between defect inspection and metrology, and indeed it seems to overlap with both. In terms of extracting metrology information, the SURFmonitor has already demonstrated excellent correlation between haze maps and surface roughness, grain size, and thickness for certain thin films. The company claims >95% (typically 98%-99%) correlation between haze maps and atomic force microscopy (AFM) for grain-size measurements of hemispherical-grain poly, copper, and tungsten.

“Many 45nm and 32nm fabs are interested in monitoring surface morphology for a variety of applications,” explained Rahul Bammi, senior director of marketing at KLA-Tencor. For example, CMP processes require expensive consumables-sets, and having some capability to provide rapid-response to excursions allows for increased use of consumables without risking excessive work-in-progress. Being able to rapidly extract the signatures for CMP scratches or jitter from haze maps allows the CMP process to be run with longer time on a given consumables-set.

In developing immersion lithography processes, a characteristic residue water-mark has been found that is so very thin that it cannot be detected by an ellipsometer. The processed haze map could detect these “sub-threshold” defects on blanket test wafers, and those locations correlated perfectly with brightfield defect data from product wafers. “This eliminates accidents before they happen,” commented Bammi.

Another example of novel productive-information generated by SURFmonitor is the ability to detect pinholes in grown gate-oxide. One fab customer had experienced gate-oxide breakdowns as seen by electrical test results that tracked to DR-SEM pin holes in the oxide, yet they had no in-line method to detect these pin-holes. The SURFmonitor results after image processing correlated to the pin-holes detected by electrical test.

Overall, this new capability provides fundamentally new knowledge about what is happening on an advanced silicon wafer during manufacturing — and since knowledge is power, this adds tremendous power to what used to be “just defect inspection.” — E.K.

July 16, 2007 – Rudolph Technologies Inc. is unveiling two metrology tools at SEMICON West, targeting DRAM, multi-surface macroinspection, as well as data analysis system to capture and analyze process performance information.

The MetaPULSE IIIa, first in a line of new inspection/metrology tools sharing a common platform, provides high-volume on-product thickness and material characterization (e.g., RMS roughness, material density, adhesion, material phase, interlayer reactions, and low-k and ultralow-k ILD modulus) for opaque (metal) films over a range of types, dimensions, and multilayered configurations. Targeting DRAM and flash memory manufacturing process control for 80-65nm and 45-32nm devices, the tool offers up to 25% greater throughput than the previous tool generation, the company claims. Rudolph says it has already received multiple orders from Taiwanese DRAM fabs.

Also debuting at SEMICON West is Rudolph’s Explorer Inspection Cluster family of multi-surface inspection tools, incorporating adaptive wafer scheduling and flexible configurations to enable configuration of individual systems with any combination of wafer front, back, and edge inspection capabilities for particular high-volume production applications, e.g., immersion lithography, copper CMP, and high-k dielectrics. The Explorer family is built on Rudolph’ automated handling platform supporting two loadports and up to three independently configurable inspection/measurement modules; future modules will offer four-loadport configurations and support five modules. An initial version featuring wafer edge and backside inspection modules is shipping this month for use in production monitoring of immersion lithography, the company says.

Lastly, the company is introducing its Discover Data Analysis System, software designed to comprehensively capture and analyze process performance information to help manufacturers identify and fix yield problems. The system uses patented review algorithms to focus the review process on defects of interest, allowing users to identify and store the root cause of an event, noted Mike Plisinski, VP and GM of Rudolph’s data analysis and review business unit, in a statement. Defect signatures can then be fed back to front-end processes in order to scrap bad wafers.

The system accepts data from “virtually any source,” according to Rudolph, including bare or patterned wafers; front/back/edges; micro/macro-inspection; metrology; optical/SEM images; and for any process (FEOL to final manufacturing).

July 13, 2007 – Days after appointing a new CEO and president, Israeli metrology firm Tevet Process Control Technologies Ltd. says it has received $2.75 million in new financing, including support from the VC arm of customer Intel Corp.

The round, led by Israeli VC firm Eurofund with participation from Cipio Partners, Eurovestech, Goldman Investments Ltd., and Intel Capital — “we were particularly pleased to see Intel Capital and one of Tevet’s customers invest in this internal round,” said Ron Hiram, managing partner at Eurofund, in a statement — brings Tevet’s total VC fundraising efforts to $13 million, to develop its high-speed integrated metrology technology for semiconductor process control. The new funds will be used to expand into new “related product development initiatives,” the company said in a statement.

Ofer Du-Nour, newly named CEO of Tevet, stated that the company has seen 2x gains in its business from last year, when it released its Trajectory T3 product line, and this new investment infusion will enable the company aggressively “take advantage of the changing marketplace as our customers move to sub-65nm technology nodes and PECVD equipment moves to throughputs above 150wph.”