The companies will focus on developing "new processes and solutions in the field of wafer-level packaging," said Frank P. Averdung, president and CEO, SUSS MicroTec AG, noting SVTC’s complementary skill set in research and innovation. The companies will jointly develop and characterize new lithography and wafer-bonding technologies.
SUSS MicroTec consigned alignment and bonding equipment to one of SVTC
November 14, 2011 — Microsemi SoC Products Group will use outsourced semiconductor assembly and test (OSAT) provider Amkor Philippines (ATP) for final electrical package test on nearly all its products.
Tester platforms at Amkor will be configured to the same set up as Microsemi SoC Products Group, to avoid any change to form, fit, function, test coverage, or quality of the product. Amkor
November 11, 2011 — Fujikura Ltd. and FlipChip International LLC (FCI) released ChipletT and ChipsetT embedded die packages for single die or multi-die semiconductor packaging applications.
ChipletT and ChipsetT package products are based on Fujikura’s flex-based laminate embedded die "WABE Technology." The roll-to-roll (R2R) flex fabrication process reportedly reduces costs and package profile (<250
November 11, 2011 — Backside-illuminated CMOS image sensors (BSI) capture light directly on the silicon light-sensitive layer. They have a higher sensitivity in a broader spectrum than the mainstream frontside-illuminated imagers (FSI). And in the field of high-end and specialty imagers, they have started to compete with established charged-coupled device (CCD) technology.
BSIs, however, are more difficult to fabricate than FSIs. They require advanced wafer thinning, surface passivation techniques to maximize sensitivity, and careful substrate engineering to minimize crosstalk. Using the possibilities of BSI technology, imager researchers are also looking at alternative architectures, producing pixels and readout electronics as separate dies and stacking those using high-density microbumps and TSVs.
Detecting and capturing light with image sensors: CCD versus CMOS
Silicon is an ideal material to make image capturing sensors, for use in digital cameras and other products. It absorbs that part of the electromagnetic spectrum that — through a lucky quirk of nature — matches the light that is visible with our eyes.
The first commercial sensor chips were CCDs, appearing around 1985. By the early 1990s, the CMOS process was well-established and CMOS imagers started to appear, first for low-end imaging applications or low-resolution high-end applications. Since then, the market has split into two segments. For low-cost, high-volume imagers, CMOS imagers have clearly overtaken CCDs. In high-performance, low-volume applications, CMOS and CCD imagers share the market, mainly because CCD technology still allows for a lower noise. In total, in 2010, the market share of CMOS imagers was 58% vs CCDs; this share is forecast to grow to 66% in 2015 [1].
When light strikes a CCD pixel sensor, it is stored as a small electrical charge. Next, these pixel charges are transported, one at a time, to the output stages. And only then, on a separate chip, are the voltages converted to the digital domain, to bits. A CMOS imaging chip, on the other hand, is an active pixel sensor: each pixel has its own circuitry. CMOS image sensors are fabricated using standard CMOS production processes, so they require less-specialized manufacturing facilities than CCDs. Also, they consume less energy, are faster, are better scalable, and allow integrating on-chip image processing electronics.
The roadmap in the image sensor industry is mostly concerned with decreasing price per pixel while increasing the number of pixels on a given chip surface — reducing the pixel pitch. Currently, high-volume sensor production capacity is moving from 200mm fabs to 300mm fabs, with minimum features reaching 65nm, and resolutions pushing beyond 16 megapixels [1].
But next to this, R&D centers such as imec are also concerned with improving the image quality. Not so much looking for smaller pixels, but for optimal performance. Capturing more photons (improving the quantum efficiency, QE), capturing them in the correct pixels (reducing or eliminating the crosstalk), and capturing a larger part of the light spectrum. Solutions are used in specialty imagers, e.g. for space applications (Figure 1).
Figure 1. 1 megapixel backside-illuminated hybrid imager consisting of a substrate with a passive photodiode array pixel-wise connected to a CMOS readout circuit using 22.5
Dig deeper into the new company’s technology in senior technical editor Debra Vogler’s blog from the unveiling event: Deca lands a 1-2 WLCSP punch
The company’s aim is to eliminate supply chain, cycle time, and integration problems with wafer-level packaging (WLP). Advanced interconnects will be formed using SunPower’s silicon solar cell wafer processing methods, which were themselves born out of Cypress’s semiconductor manufacturing technologies.
The new company is part of Cypress’s Emerging Technology Division, which acts similarly to venture capital companies in funding autonomous businesses. SunPower was spun out of Cypress in 2008 in a $2.6-billion tax-free shareholder distribution. Tim Olson is Deca president and CEO.
Moore’s Law is held back by an economic problem, noted Cypress president and CEO T.J. Rodgers, as semiconductor chips become too specialized to be integrated on one die. "The process for one type of chip, for example, a 0.35-micron RF chip, may cost $0.02 per square millimeter — making it horribly uneconomical to integrate an RF block onto a microprocessor wafer costing $0.10 per square millimeter." Deca will integrate dissimilar chips using silicon interconnect technologies at drastically lower costs, competitive with PCB-level interconnect.
Olson said, "We have met stringent reliability requirements and are now fully qualified for production with first revenue expected in early 2012. Given the high level of customer interest and engineering activity, we anticipate multiple additional customer qualifications in the next few quarters. With typical handset OEM PCN (Product Change Notice) acceptance windows averaging around one additional quarter, we are planning for our production ramp in late 2012."
Deca Technologies is an advanced electronic interconnect solutions provider that initially provides wafer level chip scale packaging (WLCSP) services to the semiconductor industry. Deca Technologies is a majority owned and fully independent subsidiary of Cypress. For more information, please visit www.decatechnologies.com.
November 8, 2011 — The Heterogeneous Technology Alliance (HTA), a team of leading European technology institutes, is developing new packaging and test methods for micro electro mechanical systems (MEMS) targeting space missions.
As part of the Wafer-Level Encapsulation in Microsystems (WALES) project, HTA members are studying how wafer-level packaging (WLP) can be used to connect and protect MEMS devices in hermetically sealed structures to withstand extreme weather and radiation conditions encountered in space. The project also will provide the European Space Agency (ESA), which is funding the project, a simple and fast standardized test to evaluate the suitability of MEMS for space missions.
Led by CSEM, the project is developing procedures for sealing and testing MEMS WLP for a piezo-electrically actuated resonator from CSEM and a capacitively actuated resonator from CEA-Leti. Fraunhofer Institute for Electronic Nano Systems ENAS is applying special measuring and testing processes to guarantee the reliability of these MEMS systems. VTT, the Technical Research Centre of Finland, will join the project consortium; negotiations are currently under way.
Focused ion beam (FIB) tool at Fraunhofer.
Increased reliability via improved packaging could extend MEMS lifetimes and make them suitable for harsh environments like space missions. MEMS could increase the sensing devices on European space projects while decreasing form factor and costs.
The HTA was launched in 2006, bringing together microsystems institutes in an alliance of ideas and joint-development projects with industry partners. Members: CEA-Leti, CEA-Liten, CSEM, Fraunhofer Group for Microelectronics and VTT. Visit www.hta-online.eu for more information.
November 4, 2011 — Numerous global semiconductor suppliers maintain assembly and test operations in Thailand. Many of these facilities have been affected by the disaster. IHS iSuppli pulled together a list of those affected, and those that have thus-far escaped damage.
Semiconductor suppliers whose test and assembly operations have been affected include ON Semiconductor, ROHM Semiconductor, Lapis Semiconductor, Hana Semiconductor, Stars Microelectronics, Vigilant Technology, STATS ChipPac and Toshiba.
ON Semiconductor: ON Semiconductor Corporation (Nasdaq:ONNN) believes that its SANYO Semiconductor division’s Thai operations in the Rojana Industrial Park in Ayutthaya, Thailand have been severely damaged by the flood. Another facility in Bang Pa In, previously unaffected, is now flooded. Read details on ONNN’s closings here.
ROHM: Sole facility in Thailand has been closed since Oct. 19. The facility conducts assembly and test for integrated circuits, discrete transistors, diodes, resistors and tantalum capacitors. ROHM is attempting to shift production to other locations.
Lapis: Rojana Industrial Park operation is closed. Lapis is looking to supply product from alternative locations.
Hana Semiconductor, a subcontractor for Microchip, Texas Instruments (TI) and others: Thai facility is currently flooded, and no assessment is possible. TI and Microchip are relocating as much production as possible to other qualified locations.
Stars Microelectronics: Ayutthaya facility has been flooded. A subcontractor for Microchip, Stars is relocating operations to other sites and anticipates that the impact on production of Microchip
November 4, 2011 – BUSINESS WIRE — Nordson Corporation will honor the life of Steven J. Adamson, former Nordson ASYMTEK marketing specialist and electronics industry mentor, by funding a $3,000 annual scholarship in Adamson’s name with the IMAPS Educational Foundation, whose role is to support student activities related to the study of microelectronic packaging, interconnect and assembly.
Adamson passed away October 28, 2011, after a 15-month battle with cancer. Donations to the fund in his honor can be made at: www.microelectronicsfoundation.org. "This donation supports the mission of the educational fund, which Steve was instrumental in establishing. We are glad we can honor the memory of Steve in this way," said Michael O’Donoghue, executive director, IMAPS.
Adamson started with Nordson ASYMTEK in 1998 as applications lab manager, and most recently was market development manager for the semiconductor packaging and hard disk drive industries. He contributed to the Axiom and DispenseJet product lines. Adamson previously held positions with Kodak, Motorola in the US, and Plessey International Computers Ltd in the UK. He was awarded five US and two UK patents. Originally from the UK, he held a Higher National Certificate in Electrical Engineering from Stockport College of Technology. In 2005 he was presented an award by the San Diego Engineering Council for "Outstanding Service to Electrical Engineering."
"We will miss Steve’s creativity, intellectual curiosity, and friendship. And the industry will miss his active participation and leadership," stated Greg Hartmeier, vice president, Nordson ASYMTEK.
Memorial services will be held 4pm, Monday, November 7, 2011 at the Oaks North Golf Course Community Center, 12578 Oaks North Drive, San Diego, in the Rancho Bernardo community.
The International Microelectronics And Packaging Society (IMAPS) leads the microelectronics packaging, interconnect and assembly community. Find out more at www.imaps.org.
Nordson ASYMTEK supplies precision automated fluid dispensing, conformal coating, and jetting technologies and designs and manufactures a full line of dispensing and coating systems. For more information, visit www.nordsonasymtek.com.
Nordson Corporation information can be found on the web at www.nordson.com.
November 4, 2011 — Test equipment maker Multitest‘s Mercury contactor passed a "thorough BGA test evaluation," landing on the qualified contactors list for all business units of an international IDM.
The IDM evaluated cost-effective test contacting with strong first pass yields (FPY). Long probe life was also an important factor.
November 2, 2011 – Marketwire — MOSAID Technologies Inc. (TSX:MSD) launched the 256Gb HLNAND2 (HyperLink NAND) semiconductor memory device, operating at up to 800MB/s per channel for mass storage applications.
The HLNAND2 Flash memory device is a multi-chip package (MCP) with a nine die stack: eight industry-standard NAND Flash dies, and one MOSAID proprietary ASIC interface chip. The MCP is packaged in a 100-ball ball grid array (BGA) measuring 18 x 14mm.
Winpac, a semiconductor packaging and test house specializing in fine-pitch BGA and wafer-level packaging (WLP), will package and distribute HLNAND devices for MOSAID. The companies signed a 5-year manufacturing license covering the 256Gb HLNAND2 (DDR533/DDR667/DDR800) and the production-ready 256Gb HLNAND (DDR266). Winpac mantains a manufacturing facility in Gyeonggi-do, Korea, and a sales and marketing operation in San Jose, CA.
MOSAID’s HLNAND Flash Memory Specification 2 has a high-speed, point-to-point ring topology, eliminating "power-hungry on-die terminations," said MOSAID’s Jin-Ki Kim, VP of R&D. SSDs using the memory can achieve data transfer rates into the multiple Gigabyte-per-second range. With a raw data rate of up to 800MB/s per channel, and 1600MB/s per channel with DuplexRW, HLNAND2 requires only one memory channel to reach a data transfer rate on the host interface exceeding 1 GB/s. The point-to-point interface creates a clean signaling environment with reduced loading, added Kim. Product features and specs are available at www.hlnand.com.
MOSAID is showcasing its HLNAND technology, and presenting a related paper, at Operating System Support for Next Generation Large Scale Non-Volatile Random Access Memory (NVRAMOS11) in Jeju, Korea, November 7-10, 2011.
MOSAID Technologies Inc. is a leading intellectual property company in the areas of semiconductors and communications, and develops semiconductor memory technology. For more information, please visit www.mosaid.com.
Winpac is a semiconductor packaging and device testing company. For more information please visit www.winpac.co.kr
