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MIT designs completely 3D MEMS


February 29, 2012

February 29, 2012 — MIT researchers have come up with a new approach to micro electro mechanical systems (MEMS) design that enables engineers to design 3D configurations, using existing fabrication processes. With this approach, the researchers built a MEMS device that enables 3D sensing on a single chip.

The silicon device, not much larger than Abraham Lincoln’s ear on a U.S. penny, contains microscopic elements about the width of a red blood cell that can be engineered to reach heights of hundreds of microns above the chip’s surface.

Fabio Fachin, a postdoc in the Department of Aeronautics and Astronautics, says the device may be outfitted with sensors, placed atop and underneath the chip’s minuscule bridges, to detect three-dimensional phenomena such as acceleration. Such a compact accelerometer may be useful in several applications, including autonomous space navigation, where extremely accurate resolution of three-dimensional acceleration fields is key.

“One of the main driving factors in the current MEMS industry is to try to make fully three-dimensional devices on a single chip, which would not only enable real 3-D sensing and actuation, but also yield significant cost benefits,” Fachin says. “A MEMS accelerometer could give you very accurate acceleration [measurements] with a very small footprint, which in space is critical.”

Fachin collaborated with Brian Wardle, an associate professor of aeronautics and astronautics at MIT, and Stefan Nikles, a design engineer at MEMSIC, an Andover, Mass., company that develops wireless-sensor technology. The team outlined the principles behind their 3-D approach in a paper accepted for publication in the Journal of Microelectromechanical Systems.

While most MEMS devices are two-dimensional, there have been efforts to move the field into 3-D, particularly for devices made from polymers. Scientists have used lithography to fabricate intricate, three-dimensional structures from polymers, which have been used as tiny gears, cogs and micro-turbines. However, Fachin says, polymers lack the stiffness and strength required for some applications, and can deform at high temperatures — qualities that are less than ideal in applications like actuators and shock absorbers.

By contrast, materials such as silicon are relatively durable and temperature-resistant. But, Fachin says, fabricating 3-D devices in silicon is tricky. MEMS engineers use a common technique called deep reactive ion etching to make partially 3-D structures, in which two-dimensional elements are etched into a wafer. The technique, however, does not enable full 3-D configurations, where structures rise above a chip’s surface.

To make such devices, engineers fabricate tiny two-dimensional bridges, or cantilevers, on a chip’s surface. After the chip is produced, they apply a small force to arch the bridge into a three-dimensional configuration. This last step, Fachin says, requires great precision.

Instead, the MIT team came up with a way to create 3-D MEMS elements without this final nudge. The group based its approach on residual stress: In any bridge structure, no matter its size, there exist stresses that remain in a material even after the original force needed to produce it — such as the heat or mechanical force of a fabrication process — has disappeared. Such stresses can be strong enough to deform a material, depending on its dimensions.

Fachin and his colleagues studied previous work on microbeam configurations and developed equations to represent the relationship between a thin-film material’s flexibility, geometry and residual stress. The group then plugged their desired bridge height into the equations, and came up with the amount of residual stress required to buckle or bend the structure into the desired shape. Fachin says other researchers can use the group’s equations as an analytical tool to design other 3-D devices using pre-existing fabrication processes.

“This offers a very cost-effective way for 3-D structures,” says Y.K. Yoon, an associate professor of electrical and computer engineering at the University of Florida who did not take part in the research. “Since the process is based on a silicon substrate, and compatible with standard complementary metal oxide semiconductor (CMOS) processes, it will also offer a pathway to a smart CMOS-MEMS process, with good manufacturability.”

The group used their analytical tool to design tiny 3-D devices out of a composite silicon structure, with each chip containing highly curved or buckled microbeams. Fachin’s sensors, placed on top of each bridge and on the surface of the chip, can triangulate to measure acceleration.

“For other applications where you want to go much larger in size, you could just pick a material that has a larger residual stress, and that would cause the beam to buckle more,” Fachin says. “The flexibility of the tool is important.”

Learn more at www.mit.edu.

February 29, 2012 — Epistar, a leading manufacturer of optoelectronic materials and devices, installed its first AIXTRON SE CRIUS II-XL system in a 19 x 4" wafer configuration to mass produce ultra-high-brightness (UHB) blue and white light emitting diodes (LEDs).

The CRIUS II-XL close coupled showerhead (CCS) multi-wafer metal-organic chemical vapor deposition (MOCVD) reactor system successfully passed the process demonstration and acceptance test at Epistar, and will now be qualified in mass production. Epistar plan to purchase more CRIUS II-XL systems when they expand their production capacity. Dr. Bernd Schulte, COO of AIXTRON, expects the tools to increase yield and directly translate into enhanced competitiveness for Epistar’s products.

The CCS technology is used in AIXTRON’s current range of reactors. Reagents are introduced into the reactor through a water-cooled showerhead surface over the entire area of deposition. The showerhead is close to the substrates and is designed to enable precursors to be separated right up to the point where they are injected onto the substrates through a multiplicity of small tubes. The reagents are injected into the reactor chamber through separate orifices in a water-cooled showerhead injector, to create a very uniform distribution of reagent gases. Substrates are placed on top of a rotating susceptor, which is resistively heated. The three-zone heater enables adjustment of the temperature profile to provide temperature uniformity over the susceptor diameter.

Located at the Hsinchu Science-based Industrial Park in Taiwan, Epistar Corporation develops, manufactures, and markets UHB LEDs. Also read: SemiLEDs, LG Siltron, Epistar install Veeco MOCVD tools

For further information on AIXTRON (FSE: AIXA, ISIN DE000A0WMPJ6; NASDAQ: AIXG, ISIN US0096061041), visit www.aixtron.com.

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February 24, 2012 — Harvard researchers developed a new kind of tunable color filter that uses optical nanoantennae to control color output. A single active filter under exposure to different types of light can produce a range of colors.

Figure 1. Kenneth Crozier and his colleagues created a plate of chromatic plasmonic polarizers that spells out the acronym LSP. Under light of different polarizations, the letters and the background change color. The image at far right shows the antennas themselves, as viewed through a scanning electron microscope (SEM). Images courtesy of Tal Ellenbogen

Kenneth Crozier, associate professor of electrical engineering at the Harvard School of Engineering and Applied Sciences (SEAS), and colleagues engineered the size and shape of metal nanoparticles so that the color they appear depends on the polarization of the light illuminating them. Harvard has named the nano structures chromatic plasmonic polarizers.

Figure 2. The color output of the new type of optical filter depends on the polarization of the incoming light.

By controlling the optical nanoantennas shape, the engineers created a controllable color filter, tuned to react differently with light of different colors and different polarizations, said co-author Tal Ellenbogen, a postdoctoral fellow at SEAS. Conventional RGB filters have one fixed output color and create a broader palette of hues through blending. Each pixel of the nanoantenna-based filters is dynamic and able to produce different colors when the polarization is changed. This can create a pixel with a uniform color or complex patterns with colors varying as a function of position.

“The chromatic plasmonic polarizers combine two structures, each with a different spectral response, and the human eye can see the mixing of these two spectral responses as color,” said Crozier. “We would normally ask what is the response in terms of the spectrum, rather than what is the response in terms of the eye,” added Ellenbogen.

Also read: Nano-antenna optics + semiconductor electronics = IR photovoltaics

To demonstrate the technology’s capabilities, the researchers used nanoparticles to spell out LSP, short for localized surface plasmon (Figure 1). With unpolarized light or with light that is polarized at 45 degrees, the letters are invisible (gray on gray). In polarized light at 90 degrees, the letters appear vibrant yellow with a blue background, and at 0 degrees the color scheme is reversed. Rotating the polarization of the incident light makes the letters’ colors change, moving from yellow to blue.

Seeing the color effects from current fabricated samples requires magnification, but large-scale nanoprinting techniques could be used to generate samples big enough to be seen with the naked eye. Building a television display with the nanoantennas is "absolutely feasible," say Crozier and Ellenbogen.

The researchers have filed a provisional patent for their work.

Potential applications include television displays and biological imaging, or invisible security tags to mark currency. The findings appear in the February issue of Nano Letters.

Kwanyong Seo, a postdoctoral fellow in electrical engineering at SEAS, also contributed to the research. The work was supported by the Center for Excitonics at MIT, an Energy Frontier Research Center funded by the Office of Basic Energy Sciences in the U.S. Department of Energy’s Office of Science; and Zena Technologies. In addition, the research team acknowledges the Center for Nanoscale Systems at Harvard for fabrication work.

Learn more at www.harvard.edu.

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February 24, 2012 — A team of scientists at Los Alamos National Laboratory has developed a process for creating glass-based, inorganic light-emitting diodes (LEDs) that produce light in the ultraviolet (UV) range, which could lead to biomedical devices with active components made from nanostructured systems.

LEDs based on solution-processed inorganic nanocrystals are inexpensively produced, reliable, and chemically stable even in harsh environments. Los Alamos National Laboratory’s Sergio Brovelli, in collaboration with international researchers led by Alberto Paleari at the University of Milano-Bicocca in Italy, created a fabrication process that gets the LEDs to emit UV light.

The glass-based material emits light in the ultraviolet spectrum and can be integrated onto silicon chips. The new devices are inorganic; the glass is chemically inert and mechanically stable, with electric conductivity and electroluminescence. A new synthesis strategy allows fabrication of all inorganic LEDs via a wet-chemistry approach, which is scalable to industrial quantities with a very low start-up cost.

Figure. Embedding nanocrystals in glass creates UV-producing LEDs for biomedical applications. SOURCE: Los Alamos National Laboratory.

The oxide-in-oxide design allows production of a material that behaves as an ensemble of semiconductor junctions distributed in the glass, rather than the sharp interface of two semiconductors found in traditional LEDs. The active part of the device consists of tin dioxide nanocrystals covered with a shell of tin monoxide embedded in standard glass: by tuning the shell thickness is it possible to control the electrical response of the whole material.

LEDs can be integrated in active lab-on-chip diagnostic platforms, or as light sources implanted into the body to trigger photochemical reactions. Such devices could selectively activate light-sensitive drugs for better medical treatment or probe for the presence of fluorescent markers in medical diagnostics.

Related stories: The ultimate limit of Moore’s Law: The one-atom transistor and IBM discovers magnetic storage limit at 12 atoms

The work is reported this week in the online Nature Communications: "Fully inorganic oxide-in-oxide ultraviolet nanocrystal light emitting devices," http://dx.doi.org/10.1038/ncomms1683. Its authors are Sergio Brovelli1, 2, Norberto Chiodini1, Roberto Lorenzi1, Alessandro Lauria1, Marco Romagnoli3,4 and Alberto Paleari1
1 Department of Materials Science, University of Milano-Bicocca, Italy.
2 Chemistry Division, Los Alamos National Laboratory, Los Alamos, New Mexico.
3 Material Processing Center, Massachusetts Institute of Technology, Cambridge, Massachusetts.
4 On leave from Photonic Corp, Culver City, California.

The paper was produced with the financial support of Cariplo Foundation, Italy, under Project 20060656, the Russian Federation under grant 11.G34.31.0027, the Silvio Tronchetti Provera Foundation, and Los Alamos National Laboratory’s Directed Research and Development Program.

Los Alamos National Laboratory, a multidisciplinary research institution engaged in strategic science on behalf of national security, is operated by Los Alamos National Security, LLC, a team composed of Bechtel National, the University of California, The Babcock & Wilcox Company, and URS for the Department of Energy’s National Nuclear Security Administration. Learn more at www.lanl.gov.

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In this three-part series, SEMATECH’s authors cover metrology for FinFETs (Read Part 1) and 3D memory devices (Read Part 2), and defect detection capabilities at 22nm. The series appears in the upcoming March 2012 issue of Solid State Technology, along with other metrology-focused pieces from KLA-Tencor and Entegris. Subscribe to Solid State Technology magazine here.

February 23, 2012 — Future challenges for semiconductor defect metrology go beyond merely extending the capability of current technologies to meet International Technology Roadmap for Semiconductors (ITRS) requirements [8]. In recent years, the yield enhancement ITRS chapter has shown that the semiconductor industry consistently arrives at each new technology node without a long-term solution that combines defect sensitivity and throughput requirements at either development, ramp-up, or HVM phases.[8]   Both defect inspection and review are approaching their fundamental limits, which cannot be easily circumvented with gradual improvements on workhorse toolsets [13].

Figure 3. There is a single defect in this 22nm-node SRAM array. Can you find it?

In the specific case of inspection, optical simulations show that the defect contrast signal decays aggressively beyond the 22nm node, and predict that deep ultraviolet (DUV) bright field tools are likely to lack useable signal at or beyond the 11nm node. Wavelength scaling is not expected to provide an acceptable solution, prompting the need to seek alternative technologies that rely on different contrast mechanisms that may bridge this gap: interferometric (phase shift signal) [14], near-field (sub-wavelength resolution), or fast probe microscopy [15]. This path-finding effort will have a steep learning curve in terms of the application space for these techniques and the engineering to translate them into manufacturing-worthy tools. An alternative path to achieve sub-11 nm inspection capability may be electron beam (e-beam) inspection. In this case, the challenge is not resolution but increasing the system throughput by several orders of magnitude, which will most likely require a breakthrough in e-beam column parallelization. Early efforts are currently driven by lithography needs, but could benefit the inspection application space [16].

After defects are found (see Figure 3 for an example), they must be identified and sourced to maintain yield, requiring increasing amounts of off-line lab analysis. As features shrink, the X-ray interaction volume used in EDX for in situ defect analysis is becoming larger than the sizes of critical defects. The only solution appears to be an explosive growth in the workload of the TEM characterization lab. The limitation to TEM is not capability but throughput. TEM requires extensive, time-consuming sample preparation. Moreover, the microscope itself is a complex device that traditionally requires hours of work by a highly skilled operator to obtain good results. The solution therefore is to focus on both problems. To this end, SEMATECH is working with leading suppliers to develop faster sample preparation techniques, by both optimizing existing technologies and testing novel methods such as plasma focused ion beam (FIB) and laser-based milling. SEMATECH is also working in cooperation with its strategic partners to develop higher speed TEM imaging capabilities. This includes testing the latest generation of high sensitivity and high throughput windowless detector systems and developing automated image setup and metrology on critical dimension scanning/tunneling (CD-S/TEM) systems.

Figure 4. Sample image of a high-speed EDX element map taken on a SEMATECH FinFET sample. Total collection time was 4 minutes.

Conclusion
As device technology transitions from traditional scaling to new architectures, new application needs are driving metrology towards evolutionary and revolutionary shifts in technologies and methodologies. Adaptation to new tool paradigms, enhancements of existing technologies, and productivity innovations will be critical to maintain process control and high yield in the coming technology generations. The SEMATECH Advanced Metrology Program is well positioned to develop solutions to address the measurement challenges of next generation devices.

Miss Parts 1 and 2? Check them out:

References
[1] Doyle, B. et al., “Tri-Gate Fully-Depleted CMOS Transistors: Fabrication, Design and Layout,” Symposium on VLSl Technology Digest of Technical Papers, pp. 133-134 (2003).

[2] Vaid, A., et al. “A holistic metrology approach: hybrid metrology utilizing scatterometry, CD-AFM, and CD-SEM.” Metrology, Inspection, and Process Control for Microlithography XXV. Proceedings of the SPIE, Volume 7971, pp. 797103-797103-20 (2011).

[3] Wang, C., Choi, K., Chen, Y. Price, J., Ho, D., Jones, R., Soles, C., Lin, E., Wu, W.L., Bunday, B. “Nonplanar high-k dielectric thickness measurements using CD-SAXS.” Proc. SPIE, v. 7272, pp 72722M (2009).

[4] De Martino, A., et al., “Comparison of Spectroscopic Mueller Polarimetry, Standard Scatterometry and Real Space Imaging Techniques (SEM and 3D-AFM) for Dimensional Characterization of Periodic Structures,” Proc. of SPIE Vol. 6922, 69221P (2008).

[5] Larson, D.J., and Kelly, T. F., “Nanoscale Analysis of Materials using a Local-Electrode Atom Probe,” Microscopy and Microanalysis Volume: 20, Issue: 3, pp: 59-62 (2006).

[6] Mody, J. et al., “Dopant and Carrier Profiling in FinFET-Based Devices with Sub-Nanometer Resolution,” 2010 Symposium on VLSI Technology, pp. 155-156

Abraham Arceo is a metrology development engineer at SEMATECH Advanced Metrology group. For the past three years he has been involved in film and defect inspection metrology development.

Benjamin Bunday is the project manager of CD Metrology and a Senior Member Technical Staff at SEMATECH (Albany, NY, USA). For ten years he has led SEMATECH/ISMI’s CD-SEM and OCD benchmarking, advanced CD technology evaluation and development efforts, and SEMATECH’s Advanced CD Metrology Advisory Group (AMAG).

Aaron Cordes is a research engineer for Sematech in Albany doing work on AFM, TEM, and focused ion beam metrology. He is also a PhD student with SUNY Albany’s College of Nanoscale Science and Engineering.

Victor Vartanian is a metrology engineer at SEMATECH in Albany, New York. Before coming to SEMATECH, he worked at Freescale Semiconductor in Austin, Texas, where he worked on applications of strained silicon to advanced transistor design and analytical applications of FTIR and mass spectrometry to environmental issues in semiconductor manufacturing and in process optimization.

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February 23, 2012 — STMicroelectronics (STM) is implementing shape memory alloys (SMA) in its optical image stabilization (OIS) motion sensor designs. Actuators made of SMAs contract upon heating.
 
OIS uses feedback from motion sensors embedded in the mobile device to control the mechanical actuator that compensates for slight movements of the user’s hand, resulting in sharper images even in low-light conditions.

Small size and low power requirements allow SMA "smart materials" to be used in actuators that are dramatically more compact, lighter, more powerful and quiet, ST reports. The technology is an alternative to voice coil motors (VCMs) and piezoelectric elements.

See STMicroelectronics at the Mobile World Congress in Barcelona on February 27 – March 1, 2012 at its booth (Hall 7, 7C18).

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February 23, 2012 — AIXTRON SE sold 2 BM Pro, formerly known as Black Magic, 4"-wafer deposition tools to the Italian Institute of Technology (IIT) in Pisa, Italy, for the development and production of graphene used in novel hydrogen storage systems.

IIT Pisa will use 1 system to deposit graphene via chemical vapor deposition (CVD) and plasma enhanced chemical vapor deposition (PECVD). The second BM Pro system is configured for high-temperature (1800°C) processing, forming graphene with sublimation. We were seeking highly uniform, reproducible thin films, said Dr Camilla Coletti at IIT, as well as flexibility in deposition, spanning CVD, PECVD, and sublimation. The tools will form the basis of IIT’s research on graphene film synthesis for nanoelectronics and energy storage devices.

The local AIXTRON support team installed and commissioned each system at the Power Nanosystems Laboratory, IIT Pisa’s Center for Nanotechnology Innovation, at Laboratorio NEST of Scuola Normale Superiore (IIT@NEST).

IIT@NEST is an interdisciplinary research and development center studying fundamental phenomena on a nanoscale and exploiting nanomaterials through innovative devices.

AIXTRON provides manufacturing equipment for microelectronics companies in light-emitting diode (LED), semiconductor, and related industries. Learn more about AIXTRON at www.aixtron.com.

February 22, 2012 — New information from the National Institute of Standards and Technology (NIST) about how layered switching devices for novel computer memory systems work may now allow these structures to come to market sooner.

Switches based on transition-metal oxides have great potential as memory devices that retain their information even when the power is turned off. One type is made by stacking four different materials: a layer of copper and one of a metal oxide sandwiched between two metal layers that act as electrodes. Such systems can act as an on/off switch when a voltage is applied between the electrodes, but just why they behave as they do is a matter of debate.

Figure. When two electrodes (top and bottom layers) whose magnetic orientation is the same (indicated by arrows) are separated by thin layers of copper (orange) and tantalum oxide (blue), a filament of copper forms through the oxide when there is a potential difference of 1 to 1.5 volts across the electrodes. When the filament forms, current can flow easily between the two electrodes. The findings help solve the mystery of why the layered structure can form electronic switches that maintain their on/off state when the power is off. Credit: NIST

Types of nonvolatile memory (NVM) already exist, but they do not yet perform well enough to function as the working memory of a computer’s central processor. If metal oxides can be perfected for this use, they could enable computers that boot up in seconds and use far less energy.

Also read: Printed non-volatile memory chip debuts

To study the switching mechanism, the NIST research team built its own version, but with a twist: They used ferromagnetic metals for the electrodes instead of the nonmagnetic metals typically used. They found that when an electric field is applied between the ferromagnetic electrodes, it causes the formation of tiny copper filaments that stretch through the metal-oxide layer. The filaments, about 16 nm long, are created or annihilated depending on the direction of the applied voltage through the electrodes, making or breaking the switch connection.

“The presence of such filaments is the only explanation that makes any sense as to why our structures make such good switches,” says Curt Richter of NIST’s Semiconductor Electronics Division.

One key to the team’s discovery was their use of the physics of spin — a quantum property of electrons that has two possible values, either up or down. From the top electrode, the team sent a current made of electrons that had a polarized spin state, and they found that their spin state had not changed by the time the electrons reached the bottom.

“Only if a filament made of high-quality copper formed would the spins maintain their state,” Richter says. “This finding was an end in itself, but it also suggests the layered structure could have applications in spintronics where electron spin is used to carry and process information.”

The findings are reported: H.-J. Jang, O.A. Kirillov, O.D. Jurchescu and C.A. Richter. Spin transport in memristive devices. Applied Physics Letters 100, 043510 (2012). DOI:10.1063/1.3679114, published online 26 January 2012.    

The National Institute of Standards and Technology (NIST) is an agency of the U.S. Department of Commerce. Learn more at www.nist.gov.

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February 22, 2012 – BUSINESS WIRE — Optical touch display company Neonode Inc. (NEON.OB) introduced Multi-Sensing technology, which is calls a "more augmented and profound user experience" than traditional multi touch displays.

Multi-Sensing identifies any object and determines its size, the pressure, any depth, the speed and the proximity of an object to a surface. It uses light with zero latency that can sense and determine objects like a pen, brush, bare/gloved finger or larger objects like a hand, at very high speed. Multi-Sensing is built on Neonode’s proprietary optical 2D multi touch technology, zForce.

It can be implemented into commercial devices such as smart phones, tablets and automotive and inflight infotainment systems. Also read: Neonode licenses optical touchscreen tech to OEM

Neonode is demonstrating the technology at Mobile World Congress (MWC) in the Swedish pavilion, hall 2.0 booth #2J31.

Neonode is a provider of optical touch technologies for portable devices. Neonode offers technology licenses and engineering design services. Neonode Inc. is traded on the OTCBB under the symbol NEON.OB.

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February 21, 2012 — Semiconductor vendors, on average, announced weak revenue in Q4 2011, on top of a sub-seasonal Q3, indicating that the anticipated correction to chip inventory levels occurred, analyst firm Gartner Inc. reports. Based on Gartner’s inventory analysis and vendor guidance, the correction process will be largely completed by Q1 2012, as evidenced by rising trends in the lead-time index.

Figure. Selected device lead times at chip distributors. SOURCE: Gartner.

Lead times of key parts used in cellphone and tablet production will rise in early 2012, as a precursor to upward movement in orders of mobile phone and tablet semiconductors, as well as inventory through the supply chain. Gartner notes that it is still too early to tell whether this is a sustainable upward trend, only that it corresponds with their current semiconductor forecast and inventory analysis.

The average of minimum lead times hit a new low since Gartner began recording this data on December 28, 2011, and it remained flat through January 4, 2012 (the average had been trending downward since mid-October).

The lead-time index, which is more sensitive to changes in lead times across all distributors, peaked in the last week of October 2011 and began trending downward, hitting its second lowest point on December 14.

The lead-time index has risen from the low of 8.1 weeks on December 14 to 8.8 weeks as of January 18. The average of minimum lead times rose from its low of 5.4 weeks on December 28 to 6.2 weeks on January 18.

Initial 2012 numbers indicate that lead times will rise as the wireless semiconductor supply chain normalizes after the inventory correction. Manufacturers should be aware of this upward trend to avoid delays in their own processes. Within the course of one week, individual parts’ lead times have lept as much as 11 weeks.

Also read: Chip inventories contract, reversing 7 quarter trend

Manufacturers should watch for increases in demand while also watching changes to their inventory levels and lead times to best match and anticipate purchasing needs.

View Gartner’s Market Trends: Semiconductor Lead Times Tick Upward in January 2012 at http://www.gartner.com/DisplayDocument?doc_cd=228223&ref=nl

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