November 15, 2016 at 1:00 p.m. ET

Free to attend

Length: Approximately one hour

Directed self-assembly (DSA) patterning is one of the primary methods being pursued for future advanced patterning nodes. Since DSA’s initial introduction in the early 2000s, great progress has been made. However, many challenges remain for achieving manufacturing readiness. Key improvements in the areas of materials, defectivity, and process integration are still needed. This webcast will cover published progress to date, review key improvements needed, and discuss new advances in DSA technology. Results from CEA-LETI’s 300-mm lab-to-fab for validation of DSA’s manufacturing readiness will be discussed.

Speakers: 

James Lamb is a 33-year veteran of the semiconductor and electronics industry in both technology development and commercialization. He currently serves as Corporate Technical Fellow at Brewer Science. Previously, he served as Director of the Carbon Electronics Center and Printed Electronics Center from 2010-2014. From 2008-2010, Jim served as Managing Director of Product Management, and from 2001 through 2008, he served as Director of Corporate Business Development and the New Business Group. Earlier responsibilities at Brewer Science include Product Reliability Manager, Customer Technical Service Manager, and ARC® materials Quality Control Manager. Before joining Brewer Science in 1984, he worked as a Process Engineer at IBM East Fishkill. He graduated from the University of Missouri-Rolla in 1982 with a B.S. in Chemical Engineering. During his career, he has contributed as an inventor on 19 patents and as a coauthor of 28 technical publications. 

Raluca Tiron joined Leti’s lithography group in 2004, working on e-beam lithography. In 2005, she integrates Leti’s Resist Expertise Center, where she worked on advanced lithography process development, resist characterization and mechanisms comprehension in 193 nm lithography. Starting in 2008, her research interest focused on directed self-assembly (DSA) of block copolymers, and she currently leads this activity at Leti. Dr. Tiron has been Leti project leader in several projects, including the national project MAGNIPHICO and the European project PLACYD. She is currently also in charge of an industrial collaboration around the DSA. She has authored and coauthored more than 60 papers in international reviews and holds more than 15 patents. Dr. Tiron received her PhD degree in molecular magnetism from Joseph Fourier University France in 2004.

October 26, 2016 at 1 p.m. ET

Free to attend

Length: Approximately one hour

With the change in the traditional IC scaling cadence, the expansive growth of “Big data,” and the pervasive nature of computing, rises a paradigm shift in integrated circuit scaling and microelectronic devices. The pervasive nature of computing drives a need for connecting billions of people and tens of billions of devices/things via cloud computing. Such connectivity effect will generate tremendous amount of data and would require a revolutionary change in the technology infrastructures being used to transmit, store and analyze data. The exponential impact of connectivity represents a data-centric future and drive an accelerated transformation throughout the network fabrics. Additionally, the users’ expectations and demand of emerging applications, such as autonomous driving, would not tolerate today’s level of latency and computing capacity. All aspects of the computing continuum – silicon, software and computing capacity that are staggered at different levels in the network- would need to be transformed and advanced performance would need to be pushed to lower levels of the network delivering an increased speed, capacity and an immediate access. This fundamental shift manifests itself through different device (s) requirements and is driving a third wave of technologies with a larger semiconductor footprint. With that comes an increased reliance on microelectronics packaging to deliver far more integrated, complex and advanced solutions at different levels of the network- from handheld and client interface devices to the data center, the cloud and devices at the edge. With accelerated and extended product life-cycle expectations, wearable electronics, and a large assortment of IoT devices, next-generation electronics will require several new packaging solutions.  Smaller form factors, lower power consumption, flexible designs, increased memory performance, and-more than ever­­­-a closely managed silicon package, co-optimization and architectural innovations.  Heterogeneous integration through package with technologies such as system in package (SIP), on package integration (OPI) and fan-out (WLFO and PLFO) are poised to change the packaging industry and play a disruptive role in enabling next generation devices.

The above mentioned move to cloud computing, the transformation of the network and the growth of data analysis are the fundamental growth drivers for the integrated circuit (IC) scaling moving forward. In turn, they represent a tremendous opportunity for microelectronics packaging to deliver, grow and transform into an increasingly influential and enabling role.

Speaker: 

Dr. Islam Salama, Intel Corporation

Dr. Islam Salama is with Intel Corporation responsible for packaging substrate Pathfinding of the high density interconnect across all Intel products. In this capacity, Islam manages a global team of technologists and manufacturing team responsible for delivering next generation packaging technologies. His team focuses on packaging substrate architectures, process and materials technology building blocks, intellectual property management, and manufacturing ecosystem development.

Islam has a Ph.D. in laser materials processing from the College of Optics and Photonics (CREOL), UCF and has been with Intel since 2003. Islam authored over 35 technical papers, was awarded more than 50 international patents in the fields of HDI substrate technology, laser technology, materials processing and semiconductor fabrication. Islam is an elected member of the board of directors for the Laser Institute of America (LIA), a member of the steering committee with the international technology manufacturing initiative (iNEMI), and a board member of Applicote Associates LLC-a photonics and manufacturing technology start-up.

Sponsored by Air Products 

Air Products has been a leading global supplier of high-purity gases, chemicals, and delivery systems to the electronics industry for over 40 years. We serve all major segments of the industry with a unique combination of offerings, experience, and commitment.  We’re advancing materials science. We’re advancing semiconductors. We’re advancing mobility. What can we help you advance?  www.airproducts.com/advancing

September 27, 2016 at 1 p.m. ET

Free to attend

Length: Approximately one hour

An industrial revolution is in the making, equivalent some say to the introduction of steam power at the tail end of the 18th century. Known as smart manufacturing, Industry 4.0 (after the German initiative Industrie 4.0), the industrial internet of things (IIoT), or simply the fourth industrial revolution, the movement will radically change how manufacturing is done. Greater connectivity and information sharing — enabled by new capabilities in data analytics, remote monitoring and mobility — will lead to increased efficiency and reduced costs. There will be a paradigm shift from “centralized” to “decentralized” production. Semiconductor manufacturing has long been thought of as the most advanced manufacturing process in the world, but it’s not clear if long-held beliefs about how proprietary data, such as process recipes, are managed. Industry experts will examine the potential for the semiconductor factory of the future, and discuss potential roadblocks.

Speaker:

Tom Sonderman, Vice President and General Manager, Software Business Unit 

Thomas Sonderman is vice president and general manager of Rudolph’s Integrated Solutions Group. He previously served as vice president of manufacturing technology at GLOBALFOUNDRIES. Prior to GLOBALFOUNDRIES he spent more than 20 years with AMD, where he held numerous executive management and engineering positions. Sonderman is the author of over 45 patents and has published numerous articles in the area of manufacturing technology. He received a BS in Chemical Engineering from the Missouri University of Science and Technology and an MBA in electrical engineering from National Technological University.

Alan Weber, Vice President, New Product Innovations, Cimetrix

Alan Weber is currently the Vice President, New Product Innovations for Cimetrix Incorporated. Previously he served on the Board of Directors for eight years before joining the company as a full-time employee in 2011. Alan has been a part of the semiconductor and manufacturing automation industries for over 40 years. He holds bachelor’s and master’s degrees in Electrical Engineering from Rice University.

Sponsored by Epicor

Epicor Software Corporation is a global leader delivering inspired business software solutions to the manufacturing, distribution, retail and services industries. With over 40 years of experience serving small, midmarket and larger enterprises, Epicor enterprise resource planning (ERP), production control software (MES), and supply chain management (SCM), enable companies to drive increased efficiency and improve profitability. With a history of innovation, industry expertise and passion for excellence, Epicor provides the single point of accountability that local, regional and global businesses demand. www.epicor.com/electronics

September 22, 2016 at 1:00 p.m. ET

Free to attend

Length: Approximately one hour

The semiconductor industry’s response to perfluorinated compounds PFCs started in 1994 when DuPont, the supplier of the primary gas used in CVD chamber cleans, C2F6, issued a sales policy restricting sales after 12/31/96 “…only to those applications that contain and either recover or destroy” C2F6 subsequent to use. The sales policy started an industry effort to understand potential impacts of all fluorinated greenhouse gases used in semiconductor manufacturing and to develop methods to estimate and reduce emissions. The industry has worked on a global basis via the World Semiconductor Council to develop common PFC metrics, measurement methodologies and approaches to reduce emissions. Preferring a pollution prevention approach, the industry and its suppliers have evaluated and implemented when feasible process optimization, gas substitution, capture/recycle and abatement. The WSC also set a goal to reduce absolute PFC emissions by 10% from baseline levels by 2010. The WSC exceeded the 2010 goal, achieving a 32% reduction, largely by replacing carbon based PFC chamber cleaning gases with NF3 in new process equipment, optimizing processes to reduce gas consumption, and using alternative chemistries and installing abatement where feasible. The new WSC2020 target calls for the implementation of best practices to further reduce normalized emissions in 2020 by 30% from the 2010 aggregated baseline. How do the semiconductor industry’s greenhouse gas emissions compare to other sectors, what data uncertainties exist, and what can be done to cost effectively achieve further emissions reductions?

Speakers: 

Debbie Ottinger, USEPA

Deborah Ottinger has worked on the U.S. Environmental Protection Agency’s (EPA’s) programs to protect climate and stratospheric ozone since 1991. She currently plays a key role in the implementation of EPA’s Greenhouse Gas Reporting Program (GHGRP), which requires large emitters and suppliers of greenhouse gases (GHGs) to monitor and report their emissions and supplies to EPA. She also manages the U.S. Emissions Inventory Program for fluorinated GHGs emitted from industrial processes.

Dr. Michael Czerniak, Environmental Solutions Business Development Manager, Edwards

Starting his professional career with Philips, initially in their UK R&D labs and subsequently in the fab in Nijmegen, Holland, Mike has worked in the semiconductor business since gaining his PhD in 1982. He had subsequent marketing roles at UK-based OEMs Cambridge Instruments, VSW and VG Semicon before joining Edwards 19 years ago. He has held various technical and marketing roles before starting his current role earlier this year.

David Speed, Distinguished Member of the Technical Staff, GLOBAL FOUNDRIES

David Speed is a Distinguished Member of the Technical Staff at GLOBALFOUNDRIES. He works in the corporate EHS group and represents GLOBALFOUNDRIES on a wide variety of environmental, health, and safety issues. He has a PhD in Environmental Engineering from UCONN, with BS and MS degrees from URI and RPI.

Sponsored by Edwards

Edwards is a leading developer and manufacturer of sophisticated vacuum system products, abatement solutions and related value-added services. Our products are integral to manufacturing processes for semiconductors, flat panel displays, LEDs and solar cells; are used within an increasingly diverse range of industrial processes including power, glass and other coating applications, steel and other metallurgy, pharmaceutical and chemical; and for both scientific instruments and a wide range of R&D applications.

Date: September 14, 2016 at 1 p.m. ET

Free to attend

Length: Approximately one hour

For a semiconductor technology node, the BEOL definition must support minimal parasitic impact to technology, sufficient reliability, required dimensional scaling from previous nodes for standard cell and custom logic requirements, and high yielding/low cost integration schemes. This webcast will discuss the key BEOL elements and innovations in these areas for the 7nm nodes and beyond. The individual elements are often in conflict with each other, but must be considered in unison to determine the overall best definition.

Speaker:

Larry Clevenger, Ph.D., Senior Technical Staff Member , 5nm, 7nm, 10nm and 14nm BEOL Architect, IBM Research

Dr. Larry Clevenger is an internationally recognized leader in semiconductor technology – taking new products from innovation to definition to early production. Since 2000 he has defined new semiconductor technologies for IBM as a chip hardware lead architect. His area of excellence is optimizing the on-chip interconnect from silicon devices to semiconductor packaging substrates for performance, yield, and cost. He is a member of the IBM Academy of Technology and he is a life time IBM Master Inventor, with over 230 issued patents. Dr. Clevenger received a B.S. in Material Engineering from UCLA and a Ph.D. in Electronic Materials from MIT.

Sponsored by Air Products

Air Products has been a leading global supplier of high-purity gases, chemicals, and delivery systems to the electronics industry for over 40 years. We serve all major segments of the industry with a unique combination of offerings, experience, and commitment.  We’re advancing materials science. We’re advancing semiconductors. We’re advancing mobility. What can we help you advance?  www.airproducts.com/advancing