Device Architecture

DEVICE ARCHITECTURE ARTICLES



Imec brings new device architecture results to SEMICON West

07/11/2011 

At SEMICON West, imec is demonstrating a viable implant-free quantum-well (IF-QW) pFETs with an embedded silicon-germanium (SiGe) source/drain and 3D integration of a commercial DRAM chip on top of a logic IC.

Extending optical lithography with complementary e-beam lithography

07/11/2011 

David Lam summarizes how the industry does not have to "throw out" optical lithography as it proceeds to more advanced nodes -- complementary e-beam lithography (CEBL) is part of the overall solution, "complementary lithography," that can overcome the resolution limitations of 193i technology.

AMAT debuts DRAM fab tools for denser transistors

07/06/2011 

Applied Materials debuted 3 systems for next-generation DRAM chip manufacturing: the Applied Centura DPN HDTM system to improve the gate insulator scaling; the Applied Endura HAR Cobalt PVD system for high-aspect-ratio contact structures; and the Applied Endura Versa XLR W PVD system for reduced gate stack resistance.

EV Group joins Ga. Tech's 3D packaging center

07/06/2011 

EV Group will contribute its know-how and technology in temporary bonding and debonding, chip-to-wafer bonding, and lithography technology to the Georgia Tech's PRC's Silicon and Glass Interposer Industry (SiGI) Consortium research program.

Elpida begins sampling 8Gb DDR3 SDRAM

07/05/2011 

Elpida Memory is now sampling a new 8Gb TSV DRAM consisting of four 2Gb layers based on TSV stacking technology.

IBM promises more reliable multibit phase-change memory

07/01/2011 

Researchers at IBM say they have developed a phase-change memory (PCM) that mitigates drift and demonstrates long-term retention of bits stored, with reliability far closer to what will be needed for enterprise applications.

CEA-Leti Annual Review: IDMs' top 3 challenges

06/28/2011 

At CEA-Leti's Annual Review, STMicroelectronics CTO Jean-Marc Chery reviewed the challenges facing IDM companies focused on SoC markets, and the three primary challenges for IDMs: FinFETs, EUV lithography, and 450mm.

CEA-Leti Annual Review: The heart of Europe's semiconductor industry challenges

06/28/2011 

At CEA-Leti's Annual Review, Leti CEO Laurent Malier noted how the important role that research and technology organizations should play in strengthening industry in Europe, and how their roles differ from groups in other regions.

Talkin' ecosystems, supply chain issues at IHS Summit

06/27/2011 

About a hundred people gathered at the San Jose Marriott on June 22 for the first IHS Global Design & Supply Chain Summit, where a series of speakers presented on everything from spending on consumer gadgets to telecom systems to fabs, lessons learned from the Japan disaster, and why the Pentagon is a poster child for counterfeit parts.

Elpida tips 4-layer mobile DRAM package

06/24/2011 

Elpida Memory has come up with what it says is the thinnest available DRAM device, a new 0.8mm four-layer package of 2GB DDR2 mobile RAM chips, assembled using package-on-package (PoP).

New architectures, litho schemes take the stage at SEMICON West

06/24/2011 

Two TechXPOT sessions at SEMICON West will address the new architectures needed to continue scaling both logic and memory devices, as well as the major challenges facing lithography both for EUV and options for extending 193nm immersion.

Photoresist market snapshot for semiconductor fab

06/23/2011 

Photoresist revenues will grow at about 5% for the next several years, says Techcet Group. Consolidation is long overdue among resist suppliers, and EUV may be the last straw. For materials, supply is abundant.

IM Flash hiring 200 in Utah, spending $1.5B on flash fabs

06/22/2011 

IM Flash Technologies, the Micron-Intel JV, plans to expand its NAND flash operations in Lehi, UT, adding 200 positions and spending $1.5B on facility upgrades.

Image sensors will gain most from 3D media, says In-Stat

06/22/2011 

As mobile devices -- game consoles, smartphones, tablets -- move to 3D platforms, image sensor demand will rise 130% by 2015, says In-Stat.

NCCAVS on 3D packaging: Bring on the TSVs

06/20/2011 

A standing-room crowd gathered at SEMI for a special NCCAVS usergroup meeting to hear about issues relevant to 3D packaging, including CMP for through-silicon vias (TSV), a DFM methodology for 3D TSV packaging designs, and TSV process integration challenges.

Imec: FinFET beat planar for bigger SRAMs

06/17/2011 

Planar CMOS slightly outperforms FinFETs for single SRAM cells, but FinFETs  "clearly outperform" and "are superior to planar" for bigger (>128KB) SRAMs, according to new research from imec.

CSCD commissions curve tracers for on-wafer power device test

06/17/2011 

CT-3100/3200 Curve Tracers from Cascade Microtech will provide wafer-level measurement for the growing power device market. The curve tracer units complement CSCD's Tesla probe systems' high-voltage and high-current capabilities.

Applied Materials adds tungsten film planarization to CMP tool

06/16/2011 

Applied Materials (AMAT) unveiled the extension of its Reflexion GT chemical mechanical polishing (CMP) system to include planarization of tungsten films. Sidney Huey, director, CMP product manager, CMP Division, Silicon Systems Group at Applied Materials, discusses the tool and the technology.

Verigy tests GDDR5 at Korean memory producer

06/15/2011 

Verigy (NASDAQ:VRGY), semiconductor test equipment provider, won orders for its V93000 HSM platform to perform volume test on GDDR5 memory devices at a large Korean customer.

Quantum transistor promises easier fab than Intel's 3D transistor

06/15/2011 

Avto Metals' Avto Quantum Transistor (AQT) modulates electrical signals via a tunneling electron either constructively or destructively interfering with electrons' wave function in a gate material. Avto credits a "unique surface geometry" for the transistor's properties.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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