Device Architecture

DEVICE ARCHITECTURE ARTICLES



Analyst: DRAM growth hinges on litho readiness, 4Xnm migration

08/13/2010 

DRAM memory "turbulence" might rear its head in 2H10 with supplies falling short of demand, because of manufacturers' problems in migration to newer processes and unable to obtain key pieces of leading-edge equipment, according to iSuppli.

Steve Wozniak will keynote Flash Memory Summit 2010

08/13/2010 

Steve Wozniak will deliver a keynote address at Flash Memory Summit 2010. Wozniak's keynote, "Driving Innovation with Solid-State Technologies" will explore how solid-state storage technologies are poised to change consumer's digital lives. Wozniak's will address how solid-state technologies are proliferating through the enterprise and well beyond from financial and Web services to bioinformatics to 3D special effects.

CAMP CMP: CMP's FEOL future, "dark art" defect work, mysterious Cu dendrites

08/10/2010 

Techcet's Michael A. Fury offers his observations from this year's International Symposium on CMP at Clarkson U. in New York. Highlights from Day 1: The latest uses of CMP in device integration; SOI wafer bonding; pad surface texture and slurry flow; Cu dendrites in 45nm interconnect patterns; and using microfluidics to measure CMP slurry particle concentration.

Optoelectronics project initiated by packaging group

08/09/2010 

The HDP User Group's Optical Interconnect project aims to alleviate intra-cabinet interconnect bottlenecks envisaged in Tbps systems by connecting electronic devices with optical paths. The project is developing optical interconnect architectures that can respond to capacity and energy efficiency needs of future high-speed systems.

Semiconductor growth prompts iSuppli to pump up 2010 forecast

08/05/2010 

Already pumped up by bulging demand, the global semiconductor market in 2010 has been injected with a powerful dose of growth steroids, prompting iSuppli Corp. to raise its revenue forecast to a record level for the year.

Analysis: Memory, foundries gain in 1H10 chip ranks

08/02/2010 

A strong rebound in the memory sector over the past few quarters has helped key players push up the ranks of top suppliers, according to new data from IC Insights. Also represented well are key semiconductor foundries.

Interfacial properties of Cu-Cu direct bonds for TSV integration

08/01/2010  With varying process conditions, the quantitative analysis of the interfacial adhesion energy of Cu-Cu thermo-compression bonds was performed. Bioh Kim, et al, EV Group, Inc., Tempe, AZ USA; Eun-Jung Jang, et al, Andong National University, Andong, Korea

Process equipment readiness for through-silicon via technologies

08/01/2010  Unit processes, integration schemes, and equipment are in place to enable development and pilot production of TSV technologies and all parts of the value chain do exist today at 300mm to enable integration technology qualification, end-product samples, and limited pilot production. Sesh Ramaswami, Applied Materials, Santa Clara, CA USA

Editors' take: TSMC raises capex, but slowdown imminent?

07/30/2010 

TSMC beat estimates with its 2Q10 results, but analysts are taking a more cautious stance amid worries of inventories on the rise and capacity additions slowing down.

Inventory concerns prompt IC unit forecast tweak

07/29/2010 

IC Insights analyst Bill McClean explains why he's becoming a little more conservative about 2H10 semiconductor industry growth. (Hint: it's about inventories, and rubber bands.)

Spin Transfer Technologies, Singulus apply deposition technology to MRAM memory fab

07/27/2010 

Spin Transfer Technologies (STT) is collaborating with Singulus Technologies AG to apply advanced deposition techniques to support commercial development of STT’s novel MRAM memory devices.

Euro Si photonics research teams coordinate technology transfer, training, education

07/23/2010 

10 European R&D project consortia focusing on silicon photonics will coordinate their efforts to facilitate the transfer of knowledge and technology and strengthen the European electronics industry’s ability to compete globally.

IME, Stanford partner on Si nanowire-based circuits

07/21/2010 

IME, a research institute of A*STAR, announced a collaborative partnership with Stanford University to develop silicon-nanowire-based circuits that are inspired by the brain. Under the research collaborative agreement, IME and Stanford will jointly develop silicon-nanowire-based neuromorphic computational elements (silicon neurons) that take advantage of the capabilities of nanowire technology.

EDA in a 3D semiconductor world: Walden Rhines

07/20/2010 

In this video interview from SEMICON West 2010, Walden Rhines, Mentor Graphics, discusses 3D technologies. EDA tools need to be extended to meet the needs of 3D -- parasitic extraction and timing, place-and-route, and other steps are different with 3D. The tools are evolving for the various 3D technologies. He also touches on lithography evolution.

Photos from the Applied Materials tour at SEMICON West

07/16/2010 

While we were not allowed to snap photos of the proprietary processes inside Applied Materials, Solid State Technology editor in chief Pete Singer put together these photos with information from the Applied Materials tour. Highlights include a solar-panel roof on the parking area, and discussion of AMAT's new products.

Workshop addresses simulating, measuring 3D IC stress using TSVs

07/13/2010 

SEMATECH and Fraunhofer IZFP hosted a follow-up meeting in conjunction with SEMICON West (Tuesday, July 13) to evaluate a design-for-manufacturing (DFM) approach to managing stress in 3D interconnects, and to drive consensus and support for these techniques across the industry.

Soitec platform enables planar FD technology

07/13/2010 

The Soitec Group (Euronext Paris) released the Ultra-Thin Buried Oxide (UTBOX) extension to its Ultra-Thin (UT) silicon-on-insulator (SOI) platform, a robust substrate solution for chip designers tackling the performance, power and density challenges of mobile consumer devices.

SIA: Another month, another chip sales record

07/06/2010 

Anyone getting tired of hearing this? Global chip sales continue to climb for another month to yet another record high, and are on pace for a stellar ~30% annual growth rate, according to the latest data from the Semiconductor Industry Association (SIA).

DUV inspection and defect origin analysis for 22nm spacer self-aligned double-patterning

07/01/2010  Tracing defects from the lithography step through the SADP process flow to the spacer open step can significantly increase the capture rate of critical defects at the earlier steps. Ofir Montal, et al, Applied Materials Inc.

Where Have All the New Apps Gone?

07/01/2010  Pete Singer, Editor-in-Chief




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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