Tag Archives: Leti

Broadening Scope of SEMICON

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Once upon a time, SEMICONs were essentially just for semiconductor manufacturing business and technology, and predominantly CMOS ICs. Back when we followed public roadmaps for technology to maintain the cadence of new manufacturing nodes in support of Moore’s Law, it was sufficient to focus on faster transistors connected with tighter wires. Now in an era that is at least partially “More-than-Moore”—as we like to refer to heterogeneous integration of non-CMOS technologies into commercial ICs—SEMICON West 2016 will focus on technologies beyond silicon CMOS such as MEMS and flexible organic semiconductors.

Alissa Fitzgerald, founder and managing member of AM Fitzgerald & Associates, will present on some of these themes Wednesday afternoon during the “What’s Next in MEMS and Sensors: Innovations to Drive the Next Generation of Growth” session (Track 2) of SEMICON’s Advanced Manufacturing Forum. Much of that growth is expected to be in sensors, microprocessors, ultra-low-power supplies, and communications chips to support the Internet of Things (IoT) connected by high-speed 5G data networks.

Flexible/Hybrid Electronics Forum at SEMICON West this year includes two full days of excellent presentations on new technologies that include thinned device processing, device/sensor integrated printing and packaging, and reliability testing and modeling. The following is the full list of forums this year:

  • Advanced Manufacturing,
  • Advanced Packaging,
  • Extended Supply-Chain,
  • Flexible/Hybrid Electronics,
  • Silicon Innovation,
  • Sustainable Manufacturing,
  • Test, and
  • World of IoT.

Partner programs include focused forums discussing trends in technology, markets, and the business of commercial IC fabrication. The industry’s default center of “More Moore” R&D is now imec in Belgium, and invited attendees of the imec technology forum (ITF) in San Francisco happening on July 11th the day before the start of SEMICON West will learn about the latest results in CMOS device shrinking from finFETs to nanowires. The next evening, French R&D and pilot manufacturing center CEA-Leti will lead a workshop detailing how to partner with the organization to bring sensor-based “More-than-Moore” technologies to market. Thursday morning will feature the Entegris Yield Breakfast Forum discussing the need for new materials handling solutions due to “Yield Enhancement Challenges in Today’s Memory IC Production.”

As the official event website summarizes:  We’ve deepened our reach across the full electronics manufacturing supply chain to connect you with more key players — including major industry leaders like Cisco, Samsung, Intel, Audi, Micron, and more. New players, demand generators, systems integrators, and emerging industry segments — all connecting in one place. Keynote presentations will be provided by Cisco Systems, Kateeva, and Oracle.

—E.K.

Leti Shows MEMS on 300mm Wafers

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As reported by EETimes from the European MEMS Summit last month, French research institute CEA-Leti has manufactured accelerometer MEMS devices on 300mm-diameter wafers. This technology is currently being transferred to Tronics Microsystems SA (Grenoble, France), which currently only manufactures on 200mm wafers. Since CEA-Leti has long functioned as the R&D group for STMicroelectronics (ST), and previously led the way for ST to produce MEMS chips on 200mm-diameter wafers, we may expect that 300mm-wafer MEMS processing is now on ST’s internal roadmap.
Moving production to larger wafers makes sense when either the chip-size or the manufacturing volume increase in size. Much of the growth in demand for MEMS is for so-called “combo” sensors that combine multiple sensor technologies, such as CEA-Leti’s piezo-resistive silicon nanowire technology which allows the accelerometer, gyroscope, magnetometer, and pressure sensor capability to be integrated on the same chip.
The compatibility of Leti’s 200mm-developed technologies with 300mm wafer fabrication, “shows a significant opportunity to cut MEMS production costs,” said Leti CEO Marie Semeria in a press release. “This will be especially important with the worldwide expansion of the Internet of Things and continued growing demand for MEMS in mobile devices.” Sensors of all sorts will be needed for all of the different “Things” to be able to capture new useful information, so we may expect that demand for combo MEMS devices will continue to increase.
—E.K.

IBM Shows Graphene as Epi Template

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Last month in Nature Communications (doi:10.1038/ncomms5836) IBM researchers Jeehwan Kim, et al. published “Principle of direct van der Waals epitaxy of single-crystalline films on epitaxial graphene.” They show the ability to grow sheets of graphene on the surface of 100mm-diameter SiC wafers, the further abilitity to grow epitaxial single-crystalline films such as 2.5-μm-thick GaN on the graphene, the even greater ability to then transfer the grown GaN film to any arbitrary substrate, and the complete proof-of-manufacturing-concept of using this to make blue LEDs.

(Source: IBM)

(Source: IBM)

The figure above shows the basic process flow. The graphenized-SiC wafer can be re-used to grow additional transferrable epi layers. This could certainly lead to competition for the Leti/Soitec/ST “SmartCut” approach to layer-transfer using hydrogen implants into epi layers.
No mention is made of the kinetics of growing 100mm-diameter sheets of single-crystalline GaN on graphene. Supplemental information in the online article mentions 1 hour at 1250°C to cover the full wafer, but the thickness grown in that time is not mentioned. From first principles of materials engineering, they must either:

A) Go slow at first to avoid independent islands growing to form a multicrystalline layer, or
B) Initially grow a multicrystalline layer and then zone anneal (perhaps using a scanned laser) to transform it into a single-crystal.
In either case, we would expect that after just a few single-crystalline atomic layers had been either slowly grown or annealed, that a 2nd much-higher speed epi process would be used to grow the remain microns of material. More details can be seen in the EETimes write up.
—E.K.

Figure 1: Leti’s 300mm diameter silicon wafer fabrication line on the MINATEC campus in Grenoble, France. In the foreground is space for a new fab intended for work on silicon-photonics. (Source: Ed Korczynski)

Figure 1: Leti’s 300mm diameter silicon wafer fabrication line on the MINATEC campus in Grenoble, France. In the foreground is space for a new fab intended for work on silicon-photonics. (Source: Ed Korczynski)

Now I know how wafers feel when moving through a fab. Leti in Grenoble, France does so much technology integration that in 2010 it opened a custom-developed people-mover to integrate cleanrooms (“Salles Blanches” in French) it calls a Liaison Blanc-Blanc (LBB) so workers can remain in bunny-suits while moving batches of wafers between buildings. I got to ride the LBB from the 300mm diameter wafer silicon CMOS and 200mm diameter wafer MEMS fabs (Fig.1) along the cement monorail to the more specialized fab spaces for industrial partners and for nanoelectronics start-ups. This was my first time experiencing this world-exclusive ISO 6 (“Class 1000”) mobile cleanroom, and it very nicely moves people in 3 minutes between cleanroom buildings that would otherwise take 30 minutes of de-gowning and walking and re-gowning. In the foreground of Fig.1 is space for a new fab intended for silicon-photonics R&D and pilot fabrication.

Figure 2: Leti’s “Liaison Blanc-Blanc” (LBB) ISO 6 mobile cleanroom connects buildings on the MINATAC campus with elevator-like automation along a cement monorail. (Source: Ed Korczynski)

Figure 2: Leti’s “Liaison Blanc-Blanc” (LBB) ISO 6 mobile cleanroom connects buildings on the MINATAC campus with elevator-like automation along a cement monorail. (Source: Ed Korczynski)

Fig.2 shows the LBB as it passes a Linde gas tower in front of spectacular alpine scenery on the way to Leti’s specialized and start-up fab building. One of Leti’s great strengths is that it does more than just lab-scale R&D, but has invested in all of the tools and facilities to be able to do pilot manufacturing of nanoscale devices. Didier Louis, Leti international communications manager and gracious tour host through the cleanrooms, explained that when working with new materials a pragmatic approach is needed; for example, color coding for wafer transport carriers informs if there is no copper, copper encased by other materials, or exposed copper on wafers therein.
—E.K.