12/10/2007  Following its release last year of a nickel standard stamp for cost-efficient nanoimprint lithography, NIL Technology has introduced stamps in quartz (fused silica) and silicon with features as small as 50 nm.

12/07/2007  This year's MEDEA+ annual forum in Budapest, Hungary (Nov. 26-28) reviewed final projects for the eight-year pan-European collaborate program for microelectronics R&D, set to expire in 2008 after overseeing three generations of CMOS technology and making the European industry a world leader in such sectors as automotive electronics, smart card technology, and image sensing.

12/05/2007  EV Group, which supplies wafer-bonding and lithography equipment for the MEMS and nanotech markets, and Brewer Science Inc., have claimed a "milestone" in handling and processing of ultrathin wafers.

12/01/2007  Continually scaling circuit features have led to tightened process requirements, including the purity levels of gas and liquid chemicals used in semiconductor manufacturing.

11/30/2007  By Debra Vogler, Senior Technical Editor

The tradition of the ISMI Manufacturing Symposium as an "in the trenches" conference, by and for the people doing the actual day-to-day work in the fabs, continued Oct. 24-25 in Austin, TX. Particular attention was given to topics on yield improvement/productivity methodologies, ESH, and sustainability. Specific talks included how to fix litho "hot spots," cleaning wafer chucks without DI water or solvents...

11/29/2007  November 28, 2007 - Hitachi Kokusai Electric has agreed to license ASM International's patents for batch atomic layer deposition (ALD) technology, to bolster its own work in the technology.

11/20/2007  ; Global Sources and SEMI Taiwan plan to co-locate their Taiwan-based electronics industry shows in 2008. International IC-Taiwan Conference & Exhibition (IIC-Taiwan) and SEMICON Taiwan are scheduled to run from Sept. 9-11, 2008, at the Taipei World Trade Center.

11/13/2007  Based on talks at Intel's Research Day in June, it appeared the company's proprietary pixelated mask technology would not be required at 32nm, but it would be ready for 22nm in case EUV and double-patterning are not. Fast-forward to this week's celebrated launch of 17 new Intel products, all based on 45nm node technology, and a few clues are emerging as to what's next on the company's lithography roadmap -- but it's still not clear if the pixelated mask technology will be used at 32nm.

11/13/2007  The new CATRENE (Cluster for Application and Technology Research in Europe on NanoElectronics) public-private partnership aims to ensure the continued development of European expertise in semiconductor technology and applications.

11/12/2007  November 12, 2007 - Toppan Chunghwa Electronics is readying mass production of photomasks for 45nm chip production to be ready by mid-2008, following the lead of parent company Toppan Printing, according to a Digitimes report.

11/12/2007  Advanced technology design was a major topic at this year's Common Platform Tech Forum (Nov. 6, Santa Clara, CA). The good news/bad news is that there are no new major design concerns at 45nm, but the hurdles the industry faced at 65nm are even more challenging at 45nm, and EDA tools need to be improved to overcome them.

11/06/2007  After forecasting good to "lackluster" 4Q sales forecasts, the top pure-play foundries (TSMC, UMC, SMIC, and Chartered) say they will reduce spending in 2008, (10%-25% declines or more). Their stated reasons -- improve productivity in current production, migrate more mature processes down to 90nm and 65nm, and get ASPs back up and improve profitability -- send a great message to the investor community. But the real reason could be a much bigger shift in the leading-edge foundry business model.

11/05/2007  Things just keep getting smaller. Two years ago at Productronica 2005, MicroNanoWorld was launched to address the increasing importance of micro-electronics production. It was continued at Electronica 2006, which alternates bi-annually with Productronica. This year, micro-electronics production is set to take center stage, as "Productronica 2007: Micro-Production in the Limelight" gets under way from November 13-16, 2007 at New Munich Trade Fair Center, Munich, Germany.

11/05/2007  Few fab management practices are more "in the trenches" than using mathematics and statistics to investigate and solve real-life problems. One such technique highlighted at the recent ISMI Symposium on Manufacturing Effectiveness was "multivariate analysis" -- specifically, comparing two ashing chambers that were supposed to be matched, but whose output showed differences.

11/02/2007  November 2, 2007 - Yale U. has dedicated a new $8 million, 2600-sq.-ft cleanroom facility for its Center for Microelectronics Materials and Structures for fabricating micro- and nano-scale devices for engineering research. The Center serves over a dozen research groups, nearly 40 students in engineering, and an increasing number of collaborators.

11/01/2007  ; Ultratech Inc., a supplier of lithography and laser-processing systems used to manufacture semiconductor devices, has received an order from Advanced Semiconductor Engineering Inc. (ASE) for its 300mm, advanced-packaging lithography system.

10/31/2007  The National Institute of Standards and Technology (NIST) reports a solution for efficiently and selectively growing nanowires in quantity on sapphire wafers using conventional lithography. The technique produces wires in specific positions and orientations accurately enough to allow attachment of contacts and to layer other circuit elements, NIST says.

10/30/2007  People doing the actual day-to-day work in fabs gathered at last week's ISMI Manufacturing Symposium (Oct. 24-25, Austin, TX), addressing topics on yield improvement/productivity methodologies, ESH, and sustainability. Specific talks focus on how to fix litho "hot spots," cleaning wafer chucks without DI water or solvents, guidelines for detecting/preventing electrostatic discharge (ESD) events, and why process stability may be the deciding factor in the battle over 450mm wafers.

10/28/2007  October 16, 2007 -- /PRNewswire/ -- AUSTIN, TX -- Molecular Imprints, Inc. (MII) today announced that Toshiba Semiconductor Company has validated the use of MII's imprint lithography technology in developing 22-nm node CMOS devices.

10/28/2007  October 16, 2007 -- LEUVEN, BELGIUM -- IMEC has reached an agreement with ASML to install an ASML EUV pre-production tool in IMEC's 300 mm facility in 2010.