06/18/2008  June 18, 2008 - At this week's VLSI Symposium in Hawaii, Fujitsu Labs and Fujitsu Microelectronics have tipped details on their development of lower-power CMOS technology logic LSIs that are "on par" with other 32nm metal gate technologies. They also say they have developed a circuit with <1μsec on/off switching to extend "off" times and reduce leakage current.

06/17/2008  Systems combining multiple inspection tasks in one tool such as frontside, backside and edge inspection traditionally can run only one wafer lot at a time. With Vistec's software package option, Parallel Job Control for LDS3300 C, it is possible to run multiple control jobs at the same time, rather than have single modules sitting idle without measuring a wafer, while other modules are continuously scanning wafers.

06/17/2008  The WS 3840, Rudolph Technologies' latest addition to the Wafer Scanner product family for inspection and metrology, integrates the company's laser triangulation technology for 3D bump metrology and sensitive 2D image-based macro defect inspection on the same wafer handler platform that is used by all of its advanced inspection and metrology tools. Laser triangulation reportedly allows for fast and accurate measurement of bump height and coplanarity.

06/17/2008  When Advanced Packaging magazine covered MEPTEC's first MEMS Symposium in 2003, MEMS was a technology with potential that needed to move from a technology-driven to a market-driven approach to succeed commercially. This year's symposium on May 22, 2008 was subtitled "MEMS Market Evolution — From Technology Push to Market Pull," suggesting that the potential has been realized.

06/17/2008  June 17, 2008 - At this week's VLSI Symposium (July 17-20, Hawaii), IMEC says its researchers say they have improved performance in planar CMOS using hafnium-based high-k dielectrics and tantalum-based metal gates for the 32nm node, reduced inverter delay by 33% (15ps to 10ps) and simplified the HK+MG process from 15 steps to nine.

06/17/2008  One of the papers being presented by Intel at this week's VLSI Symposium describes fabrication of the smallest reported floating body cell planar devices, seen as a potential replacement for standard transistor cache memory. Functional devices have been made measuring down to 30nm gate lengths, with a possible introduction at the 16nm node.

06/17/2008  June 17, 2008 -- Seashell Technology, a nanotechnology development company, has successfully scaled manufacturing processes for silver nanorod and nanowire production to kilogram scale quantities.

06/16/2008  June 16, 2008 - Toshiba and SanDisk say they are ramping down flash memory output on 200mm wafers to about 60% of current capacity, a move that includes ending production at their NAND JV FlashVision Ltd.

06/16/2008  June 16, 1008 - Gartner recently came out with its latest figures for the silicon wafer market, which it calculates grew 22.5% in 2007 to $12.5B, the 2nd straight year of >20% growth. Drivers include continued rising demand for 300mm wafers and generally higher wafer prices due to a shortage of polysilicon. Shipments rose 8.1% to 8.9B square inches.

06/16/2008  Offered as an alternative to dual-die package stacking, Entorian Technologies, provider of advanced electronic technologies and solutions for enterprise, consumer and other high-growth markets, has introduced RC Stakpak, a low-cost, package-on-package (PoP) stacking technology for DRAM memory.

06/16/2008  June 16, 2008 -- The University of Waterloo, in Ontario, Canada, has broken ground on the $160-million Mike and Ophelia Lazaridis Quantum-Nano Centre designed to propel the university and the country to the forefront of the nanotechnology research.

06/16/2008  Unisem Berhad and its subsidiary, Unisem-Advantpack Technologies (UAT) have entered into an agreement with FlipChip International (FCI) to license FCI's wafer bumping and wafer-level packaging (WLP) technologies. The agreement will reportedly include FCI's core technologies. In return, FCI will become a shareholder in UAT.

06/13/2008  by Ed Korczynski, Senior Technical Editor, Solid State Technology
The next 10 years will witness more changes in mainstream IC manufacturing technology than in the last 40 years combined. With rapidly escalating costs projected for ≤32nm-node digital CMOS manufacturing, IC companies are turning to analog, packaging, and heterogeneous integration to add greater value for lower cost and risk. In short: unique process integration challenges at each fab will drive everything.

06/13/2008  Bigger and more international than ever, exhibitors at SMT/Hybrid Packaging, June 2-4, Nuremberg, Germany, focused their product showcases around the theme of automotive electronics, or used the venue for the European launch of new products.

06/13/2008  June 13, 2008 -- OAI, a manufacturer of UV exposure equipment for semiconductor, microfluidics, and nanotechnology, has won the bid from Trinity College, in Ireland, for its Nano Imprint Module, which will be integrated with OAI's Model 800 optical front and backside mask aligner. Trinity College purchased the Nano Imprint Module for both its R & D and teaching facilities.

06/13/2008  June 12, 2008 - Toppan Printing Co. Ltd. says it has developed the first 32nm-generation photomask manufacturing process, for 193nm immersion (water) lithography, targeting volume production by June of this year. But how did the company overcome known problems with double patterning? And how compatible is it with non water-based immersion?

06/11/2008  June 11, 2008 - Elpida Memory and Qimonda AG have put the finishing touches on their proposed DRAM JV (first disclosed in April) to develop memory chips with '4F²' cell sizes utilizing 40nm process technologies (ready by 2010) and later moving to 30nm, utilizing Qimonda's buried wordline technology and Elpida's stack capacitor technology.

06/11/2008  by Françoise von Trapp, managing editor, Advanced Packaging
June 11, 2008 -- Replisaurus has maintained a low profile since announcing their first round of funding in August 2006, but there's been a lot going on for the start-up company. With last week's announcement of the company's acquisition of Smart Equipment Technologies (SET), the company is ready show the world what it's been up to.

06/11/2008  by James Montgomery, News Editor, Solid State Technology
June 11, 2008 - In its midyear forecast update/Webcast, the SIA has lowered its growth expectations for worldwide semiconductor sales to 4.3% (almost half the 7.7% it said six months ago), but SIA president George Scalise said the industry is actually doing quite well outside of the memory segment and is still showing immunity to broader US macroeconomic concerns.

06/10/2008  Just because Replisaurus, Inc. has maintained a low profile since announcing their first round of funding in August 2006, it doesn't mean there hasn't been a lot going on for the start-up company. In fact, just the opposite is true. With last week's announcement of the company's acquisition of Smart Equipment Technologies (SET), the company is ready show the world what it's been up to.