Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



ULIS invests EUR20M in advanced IR imaging sensor fab and packaging

07/10/2012 

ULIS invested EUR20 million in a new state-of-the-art facility to meet increasing market demands for IR technology, with a move to 200mm wafers and pixel/wafer-level packaging techniques.

Ultratech named advanced packaging tool supplier of choice by top-tier packaging houses

07/10/2012 

Ultratech formed 'exclusive supplier' and 'preferred tool vendor' agreements with several top-tier advanced packaging companies around the world.

STATS ChipPAC ramps advanced flip chips to HVM, adds TCB processing capability

07/10/2012 

STATS ChipPAC brought its fcCuBE advanced flip chip semiconductor packaging technology with copper column bumps, bond-on-lead interconnection, and enhanced assembly processes into high-volume manufacturing for multiple customers.

Tessera: Adding Vista Point Technologies, losing Powertech Technology?

07/02/2012 

Tessera received notice from Powertech Technology Inc. (PTI) that it will terminate its license agreement with the semiconductor packaging and optics technology company. Tessera also completed phase 1 of its acquisition of camera module technologies from Flextronics.

Unisem focuses new business model on Tier-1 customers and high-value technologies

06/29/2012 

UNISEM relaunched its business model with the name

Ultratech acquires IBM patents for semiconductor packaging processes

06/29/2012 

Ultratech acquired IBM patents on semiconductor packaging technologies, including C4 bumping, ball grid array (BGA) methods, lead-free solders, and 3D packaging.

Silicon chip-on-board LED substrate enables best thermal dissipation

06/18/2012 

Daewon Innost achieved what it says is the LED industry’s best thermal dissipation performance on its Glaxum LED Array family, based on the proprietary Nano-Pore Silicon Substrate (NPSS) technology.

ECTC

06/15/2012 

Attendance was high at this year's Electronic Component Technology Conference (ECTC) in San Diego. Sandra Winkler is senior industry analyst at New Venture Research and IEEE/CPMT Luncheon Program Chair, shares the key trends in ECTC's sessions, like WLP, 2.5D, LED packaging, and more.

StratEdge improves thermal management in power semiconductors with LL packages

06/13/2012 

The LL leaded laminate copper-moly-copper base packages dissipates heat from high-power compound semiconductor devices, such as gallium nitride, gallium arsenide, and silicon carbide chips.

Rockwell Automation helps scale Terepac circuits miniaturization method

06/12/2012 

Terepac Corp. will produce high volumes of its proprietary micro circuits for Rockwell Automation, supporting the "Internet of Things" with RFID tags. Rockwell Automation will support the infrastructure that Terepac uses, enabling it to miniaturize significantly more circuits than its current capability.

ams offers foundry customers KGD with enhanced IC test

06/11/2012 

The Full Service Foundry business unit of ams extended its dedicated test solutions for foundry customers, offering known good die (KGD), with customers' complex analog/mixed-signal ICs 100% electrically tested according to their own test specification.

Conference report: IITC closes with talks from EUV to TSV

06/07/2012 

Day 3 of the 15th IITC (International Interconnect Technology Conference) opened in San Jose, CA under clear sunny skies and a pleasant breeze. The herd thinned a bit, down to ~150 hearty souls from the original 230 the prior two days.

@ The ConFab: Supply chain or supply web for 3D packaging?

06/06/2012 

With many advanced packaging processes taking place on the semiconductor wafer, the traditional supply chain of front-end fab at the foundry and back-end fab at the packaging and test house is falling apart. The ConFab session,

3D and 2.5D semiconductor packaging technologies @ The ConFab

06/06/2012 

As packaging has played a larger and larger role in chip performance, form factor, and capabilities, The ConFab has increased its focus on back-end processes. Cue

Conference Report: International Interconnect Technology Conference, IITC

06/05/2012 

The 15th IITC (International Interconnect Technology Conference) opened Monday, June 4 at the Doubletree Hotel in San Jose, CA. Recurring themes this year were variations on 3D and TSV, novel systems and packaging, and back end memory. Mike Fury reports.

LED package sales to increase but revenues will stay flat until 2014

06/04/2012 

Displaybank published a 2009-2014 analysis of LED packages, the finished LED components used in various applications. While LED package units will grow steadily through the forecast period, revenues will remain mostly flat from 2010 to 2013.

Osram plans LED packaging facility in Wuxi

06/01/2012 

OSRAM AG will build a new LED assembly plant in Wuxi, Jiangsu, China, packaging LED chips fabbed at its Regensburg, Germany and Penang, Malaysia wafer processing facilities.

ECTC: Focus on 3D integration and TSVs

06/01/2012 

A main focus of this year’s Electronic Components and Technology Conference (ECTC), held this week in San Diego, is 3D integration and through silicon vias (TSVs).




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

Sponsored By:

Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

Sponsored By:

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