Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Cu wire bonding joins MagnaChip Semiconductor offerings

04/05/2011 

MagnaChip Semiconductor now offers cost-competitive and state-of-the-art copper wire bonding technology, which can create a packaging cost savings of about 20% to 30%. MagnaChip worked with the major packaging companies to develop a bonding process that protects wafers under bond pads.

SiliconBlue 40nm mobileFPGA roadmap targets sensor management, mobile display

04/04/2011 

SiliconBlue Technologies unveiled its mobileFPGA platform device roadmap using TSMC's 40nm low power standard CMOS process. The two distinct families target the two areas where smartphones and other handhelds differentiate.

Thinfilm PARC bring printed electronics commercialization engagement forward

04/04/2011 

Thin Film Electronics ASA (Thinfilm) and PARC, a Xerox company, entered the next phase of their co-innovation engagement for printed memory devices. This next phase extends the engagement to prototyping the product for manufacturing readiness.

HB LED packaging materials pros and cons

04/01/2011 

LEDDaniel Duffy, research scientist in Henkel's Advanced Technology Group, notes pros and cons of epoxy and silicone encapsulants for high-brightness LED (HB-LED) manufacturing, and what HB-LED manufacturers need from die attach materials. He also considers quantum dots.

Packaging Roadmaps at MEPTEC

04/01/2011  Phil Garrou, Contributing Editor

SATS provider Sigurd chooses Multitest MT2168

03/31/2011 

Multitest MT2168 semiconductor test handlerSigurd Microelectronics Corporation (Sigurd) will be the first adopter of Multitest's MT2168 pick-and-place test handler in volume production in Taiwan. The SATS provider will use it to test various QFN packages.

3D IC is only solution for scaling "up," says MonolithIC 3D exec

03/31/2011 

Transfer on top of processed wafer and replace gates (<400°C)Zvi Or-Bach, MonolithIC 3D, describes the TSV-beating monolithic IC fab process, and argues for scaling "up" rather than down. Or-Bach compares the costs of further semiconductor scaling to advanced packaging.

SEMI: Chip materials topped records in 2010

03/29/2011 

Sales of semiconductor materials rose 25% in 2010 to a new record $43.55B thanks to surging device shipments, according to final tallies from SEMI.

NXP claims smallest logic package

03/29/2011 

The SOT1115 package decreases package size by 10% for the 6-pin version. The 8-pin SOT1116 decreases the package size by 60%.NXP Semiconductors N.V. (NASDAQ: NXPI) says that it has developed the smallest logic leadless plastic packages measuring 0.9 x 1.0 x 0.35mm with 0.3mm pitch. The packages also demonstrate 4x better mechanical adhesion to the PCB than other packages in the same form factor.

Fujitsu resumes back end operations after Japan earthquake

03/25/2011 

About a fortnight since the 8.9 earthquake struck Japan near Sendai, Fujitsu has resumed some operations at its back-end packaging and semiconductor testing sites.

Supertex halves board space with 42 ball bumped die package

03/23/2011 

 Supertex (NASDAQ: SUPX) will package its HV2601 and HV2701 16-channel, low-charge injection, 200V analog switch ICs in 5.29 x 5.30mm, 42-ball bumped die packages. This packaging represents a 50% space savings over the previous 48-ball fpBGA package.

Si2 Microsystems will test fire samples for THT

03/22/2011 

Torrey Hills Technologies (THT) signed an agreement with Si2 Microsystems Pvt Ltd., India-based microelectronics company and THT furnace customer, for the use of its furnace to test-fire samples sent from THT's potential semiconductor, packaging, and solar cell clients.

TSV can deal with stress says Synopsys

03/21/2011 

Victor Moroz discusses the strong but doable effects of stress on TSVs. TSV stress ranges are comparable to the size of the TSV, and analog behaves differently than digital. Synopsys recently presented results (part of a collaboration with imec) at a SEMATECH event.

CEA Leti IPDiA partner 3D integration for passives on Si

03/21/2011 

CEA-Leti and IPDiA have formed a common lab to capitalize on their complementary expertise in miniaturization and 3D integration on silicon. The common lab will develop very high-end passive components that will resist harsh environments, functional sub-mounts for LEDs, and assembly technologies.

IEEE surpasses 400000 members

03/18/2011 

IEEE reached the 400,000 member mark for the first time in its history. By the end of 2010, total IEEE membership had surpassed 400,000, making it the seventh consecutive year the association had experienced membership growth.

Samsung licenses Tessera OptiML zoom tech

03/17/2011 

The System LSI Division of Samsung Electronics Co. Ltd. has licensed the OptiML Zoom image enhancement solution from Tessera Technologies Inc. (NASDAQ:TSRA).

Japan quake hampering package substrate supplies

03/16/2011 

Amid questions about the impact of the Japan earthquake on electronics and semiconductor production, there's one angle that could directly affect the semiconductor packaging sector: BT resin shortages.

KLAC packaged IC inspector ICOS CI T620

03/15/2011 

KLAC's ICOS CI-T620, a high-performance component inspector system for tape and reel.KLA-Tencor Corporation (Nasdaq: KLAC) introduced the ICOS CI-T620, a high-performance component inspector system for tape and reel. The CI-T620 system has dual tapers working sequentially with minimal operator intervention to increase units per hour.

Unisem adds Accretech wafer prober for 12 in wafers in Sunnyvale

03/14/2011 

Accretech’s next generation prober, the UF3000EX, offers high-speed wafer handling, a low-noise XY stage, and high accuracy with its OTS (Optical Target Scope) positioning technology. 

Molex joins antenna consortium

03/14/2011 

Molex Incorporated, interconnect supplier, has joined with other researchers to advance the goals of the Danish SAFE (Smart Antenna Front End) project. Scheduled to span four years, the $8.7 million project is being conducted by a consortium comprising Aalborg University, Intel Mobile Communications, WiSpry and Molex.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

Sponsored By:

Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

Sponsored By:

More Webcasts