Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Countdown to SEMICON West: Exhibitor Preview

07/07/2008  With SEMICON West 2008 just one week away, July 15-17,at the Moscone Center, San Francisco CA, exhibitors are getting the word out to make sure attendees don't miss a thing. While SEMI has a full-line up of conferences, keynotes, and workshops planned, many exhibitors will be leveraging the venue to announce new processes, technologies, products, and more.

QFN Test Socket

07/02/2008  The Z-Socket, or impedance socket, from Antares, is an RF QFN test socket developed to combine the reliability of traditional spring-probe technology with the impedance-matching functionality of shorter interconnects at higher price points.

Amkor Introduces Novel Flip Chip Technology

07/02/2008  Amkor Technology, Inc. announced the introduction of a high-performance flip chip packaging technology using an advanced molding process technology that is expected to provide a number of design, cost and performance advantages for field programmable gate arrays (FPGAs), CPUs, graphics processors, and ASICs. The company plans to feature this technology during SEMICON West 2008, July 15 - 17, in San Jose, CA.

Solder Joint Reliability of High-end FCSiP

07/01/2008  Challenges of high-end FCSiP include routability with acceptable signal and power integrity, package thermo-mechanical behaviors, and long term reliability performance.

A RoHS By Any Other Name...

06/30/2008  (June 30, 2008) Gail Flower, editor_in_chief of Advanced Packaging, offers her perspective in a lead-free debate initiated by Rick Short of Indium, in response to a segment of The Riley Report, "The $38 Billion Blunder" penned by AP's columnist, George A. Riley, Ph.D.

NEXX Systems to participate in IMEC's Industrial Affiliation Program on 3D integration

06/18/2008  June 18, 2008 -- NEXX Systems, a provider of process equipment for advanced wafer-level packaging applications, will participate in IMEC's Industrial Affiliation Program (IIAP) on 3D integration.

Vectron International announces high-shock MEMS-based oscillator

06/18/2008  Vectron International, a designer and manufacturer of Frequency Control, Sensor, and Hybrid Product solutions, has released its new VMEM5Q high-shock and vibration MEMS-based military clock oscillator. The VMEM5Q utilizes a small mass, high stiffness micromechanical resonator.

Probe Card for Flip Chip / Bumped Logic Devices

06/17/2008  Megamax, the latest addition to Wentworth Laboratories, Inc.'s vertical probe card line addresses major probe card challenges encountered when probing high power flip chip devices such as microprocessor units (MPU's), graphics processing units (GPU's) and System on Chip (SoC's).

Unisem, Flip-Chip ink WLP licensing deal

06/17/2008  June 16, 2008 - Unisem Berhad and subsidiary Unisem-Advantpack Technologies (UAT) have agreed to license FlipChip International's wafer bumping and wafer-level packaging technologies, in exchange for a stake in UAT. The deal is seen as expanding Unisem's technology offerings, while broadening FlipChip's customer reach.

Unisem Licenses FlipChip International's WLP Technologies

06/16/2008  Unisem Berhad and its subsidiary, Unisem-Advantpack Technologies (UAT) have entered into an agreement with FlipChip International (FCI) to license FCI's wafer bumping and wafer-level packaging (WLP) technologies. The agreement will reportedly include FCI's core technologies. In return, FCI will become a shareholder in UAT.

Asymtek Celebrates 25 Years in Business

06/16/2008  Asymtek, a Nordson company, provider of dispense, coating, and jetting technologies, recently celebrated the company's 25th anniversary. Asymtek's systems are known for innovative technology in dispensing, closed-loop process controls, and patented processes in jetting and coating. SMT Magazine talked to founder, Alec Babiarz about the company's history.

SMT/Hybrid/Packaging 2008: Exhibitor Offerings Span Electronics Supply Chain

06/13/2008  Bigger and more international than ever, exhibitors at SMT/Hybrid Packaging, June 2-4, Nuremberg, Germany, focused their product showcases around the theme of automotive electronics, or used the venue for the European launch of new products.

Toshiba develops cost-reducing MEMS packaging

06/04/2008  June 3, 2008 -- Toshiba has optimized for MEMS two packaging technologies that promise significant cost reductions. The company says it will further develop them for practical use.

New Olympus microscope sees inside MEMS

05/30/2008  May 30, 2008 -- Olympus's new OLS3000IR LEXT IR confocal microscope uses a 1310 nm laser to literally see through the silicon for non-destructive, high-resolution MEMS inspection.

Determining the Right Wafer Bumping Solution

05/29/2008  By M.K. Chew and H.G. Su, Unisem-Advanpack Technologies
Wafer bumping is fast becoming the interconnect of choice for wafer level chip scale packages (WLCSPs). This migration is primarily driven by applications like power management devices, ASIC and memory chips, display drivers, Internet routers, microcontrollers, D/A converters, and RF devices that are transitioning from wire bond plastic encapsulated units to flip chips and WLSCPs.

ECTC 2008 Gets Underway in Lake Buena Vista

05/27/2008  The 58th Electronic Components Technology Conference (ECTC), an international conference that brings together the best in packaging, components and microelectronic systems in science, technology and education gets under way Wednesday, May 27, in Lake Buena Vista, FL, with more than 340 technical papers being presented in 36 oral sessions, two poster sessions and a special student poster session.

Barry Industries Introduces Semiconductor Packaging Line

05/27/2008  Barry Industries has introduced a line of semiconductor packaging featuring high temperature cofired ceramic (HTCC) technology for aerospace, RF/microwave, semiconductor, and optoelectronic devices.

3D Integration Tour: Are TSVs the Future of Advanced Packaging?

05/22/2008  The "3D Integration North American Tour" came to San Jose on May 15 after stops in Durham, NC and Dallas, TX. The event, hosted by SUSS MicroTec, Surface Technology Systems (STS) and NEXX Systems outlined the current state of the art in through silicon vias (TSVs) and related technology.

SiP Seminar to Address Design Issues

05/19/2008  The National Microelectronics Institute (NMI) and TWI will hold the third in a series of annual one-day seminars addressing System-in-Package (SiP) trends, technologies, and applications at TWI, Granta Park, Cambridge, June 3, 2008. The program focuses on Design for SiP, a topic that has been long recognized as one of the key barriers to SiP adoption. Jan Vardemann, of Techsearch International, will deliver the keynote in SiP design and applications.

Multi Flip Chip Bonder for MCM/SiP

05/19/2008  The 8800 CHAMEO Multi Flip Chip Bonder from Datacon was developed for high-volume, high-throughput MCM / SiP assembly. Based on the same high-precision, dual-head architecture of its predecessor, the 8800 FC Quantum, it adds multi-flip-chip/MCM/SiP assembly and wafer handling capabilities as required in today's advanced manufacturing environments.




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Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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