Wafer Processing

WAFER PROCESSING ARTICLES



Rodel announces new polishing pad

12/07/2000  Chiba, Japan--Rodel, Inc. recently introduced the SPM3100 polishing pad, the newest product in its line of silicon and substrates polishing solutions. The SPM3100 pad was developed for use in the final polish step of silicon wafers and alternative substrates, such as gallium arsenide (GaAs) and indium phosphide (InP).

SEZ achieves super-thin 300mm wafers

12/06/2000  Villach, Austria--The SEZ Group announced today that it has produced 300mm wafers as thin as 80 microns, which the company reports have excellent uniformity and are four times stronger than those that have only undergone a grinding process to achieve that thickness.

Thomas West develops pad for CMP tungsten processes

12/06/2000  Sunnyvale, California--Thomas West Inc., a provider of chemical mechanical planarization (CMP) materials, has developed The Right Pad 813, a highly porous, soft pad for tungsten CMP processes. The company reports that the pad's structure will enable industry to reduce costs while solving CMP performance problems such as erosion, planarization, and uniformity, in addition to achieving high removal rates combined with low slurry consumption.

ASML introduces dual wafer stage technology

12/06/2000  Tokyo, Japan--ASML today introduced dual wafer stage technology for new i-line and deep ultraviolet (UV) imaging systems, extending the product offerings of its TWINSCAN 300mm technology platform. This dual wafer stage system optimizes the lithographic processing of 300mm wafers by parallel operation of two independent wafer stages, according to ASML.

SEMI projects manufacturing equipment market growth of 22% in 2001

12/06/2000  Tokyo, Japan--Semiconductor Equipment and Materials International's (SEMI) 'Consensus Forecast,' which includes input from 72 of the trade association's member companies in the U.S., Europe, and Japan, projects that the semiconductor manufacturing equipment market will grow 22% in 2001 to US$57.2 billion.

Trecenti produces 300mm foundry wafers

12/05/2000  Hitachinaka City, Japan--Trecenti Technologies, Inc., a joint-venture foundry established by Hitachi and UMC, has produced its first ICs using 300mm wafers. The 4M and 8M static random access memory (SRAM) chips were fabricated using 0.18-micron technology and demonstrated reasonable first-silicon yields, reports the company.

Ultratech Stepper introduces stepper for flip-chip R&D

11/29/2000  San Jose, California--Ultratech Stepper, Inc., a supplier of photolithography systems used to manufacture semiconductors, micromachined devices and thin film heads (TFH) for disk drives, today announced the introduction of the Prisma-ghi, a low-cost research and development (R&D) and pre-production flip-chip (bump) stepper.

Motorola qualifies enhancement-mode GaAs technology

11/28/2000  Phoenix, Arizona--Motorola's Semiconductor Products Sector has completed qualification of its true enhancement-mode heterostructure field effect transistor wafer process.

Applied Materials boosts ion implant operations

11/28/2000  Santa Clara, California--Applied Materials, Inc. is expanding its ion implant operations with the addition of laboratories and manufacturing sites to enhance the company's capability to provide advanced implant systems and technologies for building next-generation, high-speed transistors in sub-0.13 micron devices.

Elpida plans 300mm fab in Japan

11/28/2000  Tokyo, Japan--Elpida Memory, Inc. is planning to construct a 300mm wafer fab, its first, on the grounds of NEC Hiroshima, Ltd. Construction will begin in January 2001, with volume production of 256 Mb dynamic random access memory (DRAM) devices in a 0.13-micron process expected to begin during the first half of 2002.

Pentagon opens fifth semiconductor parts reconditioning facility

11/21/2000  Fremont, California--Nov. 21, 2000--Pentagon Technologies, Inc. is opening a fifth semiconductor parts cleaning and reconditioning facility in Portland, Oregon to meet the demands of advanced wafer fabrication equipment requirements--focusing on cleaning and reconditioning parts and assemblies used for 200mm and 300mm wafers, sub-180nm fabrication techniques, and copper interconnect processing.

Peregrine plans fab for 0.25-micron silicon-on-sapphire ICs

11/20/2000  Homebush, Australia--Nov. 20, 2000--Peregrine Semiconductor Corp., a developer of integrated circuits (ICs) for the optical and wireless communications markets, is developing the first wafer fabrication capability for 0.25-micron ICs in its Homebush, Australia fab.

SRC/SSA/SEMATECH offer challenge to universities

11/17/2000  Austin, Texas--Nov. 17, 2000--To encourage research into environmental, health, and safety issues within the semiconductor industry, a $5,000 award is being offered to university researchers worldwide jointly by the Semiconductor Research Corp. (SRC), Semiconductor Safety Association (SSA) and International SEMATECH.

TSMC's Fab 6 pilot line now processing 300mm wafers

11/16/2000  Hsinchu, Taiwan--Nov. 16, 2000--Taiwan Semiconductor Manufacturing Co. (TSMC) has begun processing 300mm wafers on its Fab 6 pilot line.

TSMC announces 0.13-micron mixed-signal/RF test chip

11/15/2000  Hsinchu, Taiwan--Nov. 15, 2000--Taiwan Semiconductor Manufacturing Co. (TSMC) has developed what is believed to be the industry's first comprehensive 0.13-micron, mixed-signal/radio frequency (RF) test chip. The new chip is expected to help TSMC create characterization reports and other elements of the 0.13-micron, mixed-signal/RF design kit.

Discovery Semiconductors receives micro-satellite technology patent

11/13/2000  Princeton Junction, New Jersey--Nov. 13, 2000--Discovery Semiconductors, Inc., has been awarded U.S. Patent No. 6,137,171, entitled 'Lightweight miniaturized integrated micro-satellite employing advanced semiconductor processing and packaging technology.'

NIST funds advanced wafer inspection technology development

11/09/2000  Gaithersburg, Maryland--Nov. 9, 2000--The U.S. National Institute of Standards and Technology's (NIST) Advanced Technology Program (ATP) has awarded $13.7 million in funding for a project to develop advanced wafer inspection technology for next-generation lithography (NGL) applications at the 50-nm and 70-nm nodes.

Sterling Semiconductor boosts SiC wafer production

11/08/2000  Sarasota, Florida--Nov. 8, 2000--Sterling Semiconductor, Inc., a subsidiary of Uniroyal Technology Corp., is installing additional silicon carbide (SiC) production equipment to increase its SiC wafer production by a factor of 10 in 2001.

Cornell opens RF chip lab with industry help

11/08/2000  Ithaca, New York--Nov. 8, 2000--With support from major industrial partners, Cornell University has opened a state-of-the-art laboratory for the design and testing of radio-frequency (RF) integrated circuits (ICs), such as the transceivers in cellular phones and other wireless devices.

TSMC makes move to take over WaferTech

11/08/2000  Hsinchu, Taiwan--Nov. 8, 2000--Taiwan Semiconductor Manufacturing Co. Ltd.'s (TSMC) board of directors has approved the acquisition of Camas, Wahington-based WaferTech, LLC's shares from the company's current stakeholders in a move that will increase TSMC's stake in the company from 66.89% to 99%.




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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