Category Archives: Metrology

September 30, 2011 – Semiconductor equipment spending in 2011 looks to be slightly weaker than anticipated, and is looking a lot softer in 2012 across the board, according to Gartner’s new semiconductor capex forecasts.

Compared with the firm’s June 15 outlooks, investments are looking a bit softer in 2011, now at about a 9% clip overall to $61.83B, instead of 12%. Within that, capital equipment is seen around 7% (vs. 10% previously), as wafer-fab equipment (WFE) investments are slightly more busy than on the backend which is seen roughly flat or down slightly.

The big changes are in 2012, where Gartner sees nearly a -17% decline in total spending to $51.53B (vs. what had been seen as just a -3% slip), with even bigger dropoffs "across the board" (nearly -20% in some cases) Foundries are still spending on their 28nm ramp, but slowing spending on everything above that (90nm through 45nm), and in some cases reusing those older-node tools to help prop up capacity utilization, notes Gartner managing VP Klaus Rinnen in a statement. Another factor: media tablet production has been a little weak (Apple is rumored to be throttling back on its iPad output), softening the NAND market which had been partly offsetting a woeful year for DRAM.

Gartner sees the current slowdown extending into 1H12, by which point supplies and demand should be better balanced, PC demand should rebound, and (hopefully) macroeconomic factors stabilize enough to spur consumer purchasing confidence — and thus DRAM makers and foundries will have to start spending again. 2013 should be a better growth year; Gartner now sees 18% for total semiconductor capital spending, more than double its previous 9% outlook. That upswing is seen to extend into 2014, where Gartner now sees slight 2% growth vs. a -15% decline; 2015 would then be the next true "down" year for industry spending at -5.1% (vs. a previously-expected 14% rise).

By specific equipment segment, here’s what Gartner is forecasting:

WFE: 9.2% in 2011, -19.6% in 2012. Slowing revenue started in 2Q11 and accelerating through 2H11, pressured by slowing device sales and inventory liquidation. Leading-edge equipment areas doing best are immersion litho, etch, deposition (segments involved in double patterning), and "critical leading-edge logic processes." Demand for 200mm equipment will continue to be strong for analog and discrete devices needed for mobile devices’ power and energy management functions.

Packaging/assembly: -1.4% in 2011, -17.5% in 2012. Orders have softened "more aggressively than previously expected" as supplies are worked down to be "in line with expectations," Gartner says. Among backend process capex purchases, hot areas continue to be 3D packaging and Cu wire bonding, though "at a reduced pace." Most major tool segments will see slightly negative sales in 2011, but advanced tooling will outperform the broader market. For 2012, advanced packaging segments shouldn’t fall as badly as traditional tooling segments.

Automated test: 0.4% in 2011, -18.1% in 2012. Growth will be essentially flat this year, but driven by SoC demand and advanced RF. Look for a pullback in memory ATE due to soft DRAM capex, though NAND test should be stronger than the general memory test market. For 2012 Gartner sees "a significant decline in tester sales," though with memory systems "hold[ing] up reasonably well" as DRAM capex returns.

Worldwide semiconductor capital equipment spending forecast, in US $B. (Source: Gartner)

September 21, 2011 — Synopsys Inc. (Nasdaq:SNPS), software and IP provider for electronics design, verification and manufacture, enhanced its TetraMAX ATPG and Yield Explorer to improve volume diagnostics flow and speed up yield ramp for IC manufacturing.

If yield does not reach acceptable levels during initial semiconductor manufacturing phases, dominant failure causes must be identified and fixed. Volume diagnostics efficienctly determines failure causes. TetraMAX ATPG identifies potential defects from scan test failures, using physical design data to significantly improve diagnostics accuracy; Yield Explorer analyzes these potential defects across multiple failing devices to uncover systematic yield issues, also using physical design data to identify specific yield-limiting layout geometries.

The Synopsys enhanced volume diagnostics products cross-correlate large volumes of data from design, fab, and manufacturing test to analyze defect causes. In this latest release, flow in TetraMAX ATPG and Yield Explorer is automated with a new direct connection between the two products. The upgrade includes functionality to import both physical design and test data from defective silicon using industry-standard formats.

LEF/DEF facilitates easy, one-time import of physical design data, and STDF V4-2007 enables transfer of defective silicon data from industry-leading testers. The new STDF V4-2007 format was developed by SEMI’s CAST working group.

TetraMAX ATPG and Yield Explorer are part of Synopsys’ comprehensive synthesis-based test environment, along with DFTMAX compression for power-aware scan test, DesignWare STAR Memory System for test and repair of embedded memories, and DesignWare SERDES IP with built-in self-test (BIST).

Synopsys Inc. (Nasdaq:SNPS) is an electronic design automation (EDA) supplier to the global electronics market. Visit Synopsys online at http://www.synopsys.com/.

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September 13, 2011 — Bruker Corporation will acquire Center for Tribology Inc. (CETR) for an undisclosed sum, adding the Silicon Valley company to its Bruker Nano Surfaces division.  CETR is projecting calendar year 2011 revenue above $10 million and EBITDA over $2 million.

CETR will become a separate Tribology and Indenting business, joining the division’s atomic force microscope (AFM) and stylus and optical metrology (SOM) businesses. The mechanical structure testing capabilities will complement Bruker’s optical and atomic metrology tools, said Mark R. Munch, Ph.D., president of the Bruker Nano Surfaces division, adding nano-mechanical testing to surface/topology characterization tools.

Norm V. Gitis, Ph.D., founder, CEO and president of CETR, commented that the acquisition would introduce CETR products to “new regions and markets.”

CETR technologies are used to characterize nano-, micro- and macro-mechanical and tribological properties under harsh environmental conditions (high and low temperatures and humidity, vacuum, gases, etc). The instruments are used in academic and industry research on thin films, ink jet cartridges, oils, and many other products.

The transaction is expected to close at the end of the third quarter of 2011, subject to customary closing conditions.

CETR develops and manufactures nano-mechanical and tribological test instrumentation, serving both basic materials research and industrial manufacturing in a wide range of fields, including the biomedical, petroleum, microelectronics, energy, and automotive markets. For more information about CETR, visit www.cetr.com.

Bruker Corporation (NASDAQ: BRKR) makes scientific instruments that address the needs of a diverse array of research and production customers in materials, chemical analysis, life science and pharmaceutical, biotechnology and molecular diagnostics research. For more information about Bruker Corporation, visit www.bruker.com.

September 5, 2011 – JCN Newswire — ULVAC Inc. uncrated the UNECS-3000A spectroscopic ellipsometer, which can measure the thinness of a thin film and optical constant. The noncontact film measurement tool targets semiconductor and liquid crystal display (LCD) manufacturing control.

The tool can be used to evaluate resist film thickness for semiconductor lithography and organic EL display film, and in research and development as well as production-line measurement tasks.

Ulvac released the UNECS-2000 with a compact sensor and faster measurement in 2010. Teh UNECS-3000A builds on this technology with an automatic mapping function to measure the thickness distribution of the substrate surface and support 300mm wafers.

The UNECS-3000A measures 106 points on a 300mm wafer in 120 seconds (maximum speed of 20ms/point). Measurement speed is acheived via spectroscopic ellipsometry with two high-order retarders.

The automatic R-Theta stage supports a maximum 300mm wafer, automatically measuring surface thickness and optical constant distribution. Results are displayed in a color map. Up to six layers of film thickness can be analyzed at one time. (Film thickness and optical constants can be measured simultaneously only for the upper layer of film.)

Automatic height adjustment, analysis software, and other equipment are standard. The materials table file, containing optical constants for substrates and films, can be edited and added to by users.

Ulvac expects to sell 20 units during the first year.

ULVAC (Ultimate in Vacuum), Inc. (TSE: 6728) provides equipment for flat panel display, solar cell, semiconductor and electronics manufacturing. For more information, please visit www.ulvac.co.jp/eng.

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August 16, 2011 — KLA-Tencor Corporation (NASDAQ:KLAC) launched the eDR-7000 electron-beam (e-beam) wafer defect review system for chip manufacturing at the 20nm device nodes and below. New technologies enhance sensitivity and throughput during defect imaging and classification processes.

Also read: Yields are key to low costs, in traditional chips and emerging LEDs

The eDR-7000 can "re-locate and image 10nm defects" and oft-missed defect types, and can "review multiple defects per second," driving directly to the defect site at high resolution, said Cecelia Campochiaro, Ph.D., VP and GM, KLA-Tencor’s e-Beam Technology division.

The third-generation, field-tested e-beam immersion column offers high resolution and topographic imaging. The advanced stage and vibration-isolation system claims a three-fold improvement in coordinate accuracy and up to a four-fold increase in defect review speed over the current-generation tool. Sensitivity improvements for bare wafer defects are enabled by energy-dispersive x-ray (EDX) composition analysis. A unique reticle defect review mode investigates sites where reticle defects may have printed. KLAC also reports faster process window characterization. Voltage-contrast imaging mode is used to review e-beam wafer inspection data; offline defect classification capability is also available.

KLAC has received orders for eDR-7000 systems from logic, memory, and equipment manufacturers and foundries. Multiple systems are in use for development and chip production.

KLA-Tencor Corporation (NASDAQ: KLAC) provides process control and yield management products for the semiconductor, data storage, LED, photovoltaic, and other related nanoelectronics industries. Additional information may be found at www.kla-tencor.com.

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August 10, 2011 – BUSINESS WIRE — Carl Zeiss Nano Technology Systems, CEOS GmbH, and the University of Ulm have completed 2 years of evaluation and are starting the second phase of the Sub Angstrom Low Voltage Electron Microscope (SALVE) project.

SALVE aims to create a transmission electron microscope (TEM) capable of imaging samples with atomic resolution at very low acceleration voltages. Medium-voltage TEMs with accelerating voltages of 200-300kV destroy radiation-sensitive samples prior to image capture and material analysis. Sample preparation methods are also being researched.

The SALVE project’s goal is to overcome the hurdle that lower accelerating voltages lead to significant optical aberrations. Phase 1, 2009-2011, showed that atomic-resolution images could be generated at accelerating voltages below 80kV.

The German Research Foundation (DFG) and the Ministry for Science, Research and Art from the Federal State of Baden-Wuerttemberg (MWK/BW) support the SALVE project Phase 2 with €3.2 million (DFG) and €2.1 million (MWK/BW).

The SALVE TEM technology could be used to study superconductors and semiconductors, as well as lithium-ion batteries (Li-ion), plastics, and biological materials.

Carl Zeiss will work on developing the microscope system; the University of Ulm will develop applications and research sample preparation methods; CEOS will work on an optimized corrector to compensate for the chromatic and the spherical aberration at low voltages.

The Carl Zeiss Group develops optical and opto-electronic products. Carl Zeiss NTS GmbH is the Nano Technology Systems Division of Carl Zeiss, focused on electron microscopy. Learn more at www.smt.zeiss.com/nts.

August 9, 2011 – Robert Newcomb from Qcept Technologies explains his company’s nonvisual defect inspection technology for logic and IC manufacturers, speaking at SEMICON West 2011.

In today’s advanced manufacturing nodes, leading-edge wafer fabs are focused on yields and integrating new materials successfully. Customers in mainstream 200mm/300mm semiconductor fabs are more focused on cost reduction and environmental friendliness. Yield is still important, but the aim is a balance of cost savings, high yields, and other factors.

Ultrathin low-k dielectrics, high-k metal gate (HKMG) processes, and other technologies are creating new defectivity issues at 22nm. In some cases, Newcomb says, optical inspection will catch these, but other non-visual defects are becoming more prominent. Below 22nm, partnerships will be key, Newcomb expects. Fab customers are valuable in metrology research, as are wafer processing equipment companies.

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August 4, 2011 — Light emitting diodes (LEDs), silicon germanium (SiGe) semiconductors, and wafer-level packaging (WLP) bumps each present their own challenges to metrology systems, says Alon Kapel, Jordan Valley Semiconductor. He speaks with Debra Vogler at SEMICON West 2011.


LEDs are growing very fast, and the metal-organic MOCVD tool is the heart of the process, says Kapel. For about every 10 MOCVD tools, users need 1 metrology tool. Every MOCVD batch takes 12 hours, so measurement needs to be very fast, allowing the next substrate to begin processing.

Other areas where metrology is helping advance semiconductor technology include the move to triple-layer SiGe on the front-end, and wafer-level packaging on the back-end. Metrology tools must keep up with the pace of production and still offer the highest level of accuracy possible. (Last year Jordan Valley debuted the JVX7200 HRXRD/XRR for in-line SiGe process monitoring.) In wafer-level packaging, silver/tin bumps must be measured on-wafer and on-line.

Jordan Valley is collaborating on 450mm projects and participates in consortia, but Kapel noted that 450mm is a burden on vendors and the question still being asked is, "where

July 15, 2011 — SigmaTech’s UltraMap-TSV system won Best of West at SEMICON West, presented by industry association SEMI and Solid State Technology.

The UltraMap-TSV system from SigmaTech is the world’s first fully automated through silicon via (TSV) and deep-trench metrology system capable of characterizing both TSV and deep-trench features from both the front and back sides of subject wafers, up to 300mm in diameter.

The winner was chosen by a prestigious panel of judges representing a broad spectrum of the microelectronics industry.

Check out all 3 finalists here.

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