Category Archives: Semicon West

July 19, 2006 – Carl Zeiss SMT has acquired all the shares of ALIS Corp., a developer of helium ion microscopy technology, from a group of financial backers and strategic investors, extending its portfolio of nanoscale measurement and probing technologies. Terms of the deal were not disclosed.

ALIS, a participant in the Technology Innovation Showcase at this year’s SEMICON West, has developed a new atomic-level helium ion microscopy technology that provides substantially better resolution and faster image acquisition than conventional methods, and may allow probing to much finer dimensions than SEMs or TEMs.

Slated to be officially unveiled later this month, the LookingGlass LG-2 uses helium ions in a beam as the imaging particles. Because ions can be focused into a smaller probe size and have less sample interaction, the system can generate higher-resolution images with more material contrast, and enable better detail than scanning electron microscopes, the company claims. The first production version of the microscope is now being assembled, with applications projected for defect review and CD measurement.

Dirk Stenkamp, managing director of Carl Zeiss’s Nano Technology Systems division, said the Alis platform will complement the company’s SEM technology, and become “a key element of our future technology roadmap,” offering “unrivalled opportunities for sub-nanometer imaging, depth-of-focus capabilities and new image contrast features.”

by Phil LoPiccolo, Editor-in-Chief

In a revealing keynote address at SEMICON West last week, Micron Technology chairman and CEO Steve Appleton offered a behind-the-scenes look at his company’s experience in forming business partnerships, and offered some hard-won insight into why partnerships fail and what can be done to ensure their success.

According to Appleton, business relationships are a lot like marriages, in that the majority of them do not succeed. To the many laws governing the science and business of semiconductor manufacturing, we must now add one more, he suggested — “the Law of Partnerships,'” which states that 40%-50% of all business partnerships, and 70% of all acquisitions, will fail. Appleton citied the extensive experience Micron has had over the years in building partnerships, most notably with Intel and Toshiba, as well as with lithography, etch, and materials suppliers and customers.

There are a number of reasons why partnerships fall short, according to Appleton, who offered advice on how to avoid common pitfalls. One big mistake companies make is going into partnerships thinking they are going to change their partner, and as in marriages, that rarely happens, he said. While it’s true that companies do change over time, such as when transitioning from a start up to a mature company, these changes need to be allowed to happen internally, he explained.

Another reason partnerships fail is because expectations are not set correctly, Appleton said. As an example, he pointed to Micron’s operation in Lehi, Utah, which after completion was scaled back to a test facility because of collapsing market conditions. “Despite the fact that we spent a billion dollars on the facility and hired hundreds of people for the test operation, we were very heavily criticized by the people of Utah and the media,” he said.

To avoid such issues, expectations have to be well designed and understood, Appleton asserted. For Micron’s new joint venture with Intel, IM Flash Technologies (IMFT), the two companies spent months negotiating the details of the project, which as a result is governed by 43 contracts, each of which totals some 200-300 pages. “Part of this is a case of attorneys gone wild,” he said, “but the contracts describe the expectations and goals all the way from the business plans to the investments to the timing, so that we have a good understanding of what the expectations are on their part and on our part. And that’s critical to making sure you have a good partnership.”

Partnerships also fail when the goals of the participants are not aligned. Appleton cited an agreement from the 1980s in which Intel invested about a quarter of a billion dollars in Micron, and ended up making a 4X return on investment — but still was disappointed because only six or seven of its 10 goals were accomplished. Fast-forward to a few years ago, when Intel made a similar investment in Micron, and the goals of both companies were completely aligned, related to developing next-generation technology, bringing it to market, investing in advanced capacity, etc. Intel didn’t make nearly as much money, but they were a lot happier about the partnership, and it ultimately led to the duo’s new all-out IMFT joint venture announced in January to manufacture NAND flash memory products, Appleton said.

Speaking about the new JV, Appleton noted the tool-installation schedule calls for the implementation of some 100 tools/month, which means that some 4000 training events must occur prior to full production. “We have to work together, or we can’t possibly get this accomplished,” he added.

Forming partnerships wasn’t always a priority for Micron, Appleton admitted, but he said it’s now one of the key objectives for improving the value of the company. He noted that Micron is now working to implement 35nm technology, and that partnerships have been the key to enabling them to “to get this far this fast.” Moreover, Micron is extending its partnerships further. During SEMICON West, the company announced that it has joined IMEC to conduct research on sub-32nm CMOS and advanced flash memory.

“Partnerships are difficult, to say the least,” concluded Appleton, “but they are necessary, and if done correctly for the right reasons, they can lead to a tremendous benefit. We’ve proven that they can work — and we’ve proven that they can’t work if you don’t have the right approach.” — P.L.

by M. David Levenson, Senior Editor

At a SEMI/Dataquest cosponsored event prior to SEMICON West, Klaus Rinnen of Gartner/Dataquest reported a bright outlook for 2006, both for the semiconductor industry (11% growth) and its equipment suppliers (24%), followed by a potential “soft patch” in 2007, before an upturn to record levels in 2008. That feeling of comfort combined with tempered optimism characterized the entire atmosphere at SEMICON West — everyone seemed to feel that things were good now, and that the future is no more uncertain than usual, in our cyclical industries.

The keynote presenter at the SEMI/Dataquest Market Symposium, Wally Rhines, CEO of Mentor Graphics, emphasized the critical role of manufacturing simulation in electronic design. He explained that the ITRS-desired CD uniformity for 45nm generation gates is 4-atom widths, a precision that requires successful designs to incorporate manufacturing realities. Numerous companies, however, are providing the necessary software, including Mentor and >20 startups that have absorbed >$90M of venture capital funding, he reported. Without DFM, chip yield is problematic, according to Rhines, but the necessary models incorporating foundry process data are becoming available. Simulation also facilitates targeting of key structures for in-line metrology, speeding that process, and enables rational discussion about trade-offs involving timing, power, and process window.

The leading edge of lithography in 2006 is the 45nm generation, which everyone seems to expect will be made using 193nm excimer laser exposure with water immersion scanners having numerical apertures near 1.3. Such tools require exceptional laser stability. Enter Cymer, which announced a new model, the 60W XLR 500i, incorporating an innovative “ring” power amplifier. In such a system, the light injected from the master oscillator circulates through the amplifier chamber until it extracts all the available energy, rather than exiting after one or two passes. Near complete energy extraction improves pulse energy stability by 50%, reported Nigel Farrar, VP of lithography applications marketing at Cymer. Stability reduces the number of pulses needed to land in a narrow exposure window, facilitating increased scan speed and throughput. Ring technology also permits reducing the master oscillator energy, which improves component lifetime and reduces cost-of-ownership (CoO), according to Farrar.

Industry leaders discussed the prospects for 32nm half-pitch lithography at a breakfast presentation sponsored by Sokudo Corp., the new DNS/Applied Materials joint venture in coat-development tracks. Keynote speaker Burn Lin of TSMC pointed out that logic will not truly require a 32nm half-pitch until the 22nm node, and that water immersion lithography would be adequate until then. Recent progress (including shielding the edge of the wafer) had reduced the immersion related defect count to an average of <5 per 300mm wafer, according to Lin.

However, when 32nm half pitch really does become necessary, Lin predicted the industry will have to make some not-so-obvious choices. High-index fluids will not be enough to make production feasible, and multiple exposures with water immersion will have to contend with a depth-of-focus of <140nm, as well as high mask costs. Lin calculated that combating linewidth roughness in EUV lithography will require immense improvements in soft X-ray source efficiency. If there were a maskless e-beam exposure tool with throughput of 15 wafers/hour, that tool would have the lowest CoO of all technologies for wafer runs of up to a few thousand, and for essentially all wafer runs after tool depreciation, he said. Multi-beam writing technology might make such a tool feasible in time, but it would represent a 2x order-of-magnitude throughput improvement over the current state of the art.

Luc van den Hove of IMEC characterized the progress needed to reach 32nm half pitch with three parameters: NA, k1, and λ. Improving NA means finding higher-index materials for the lens, immersion fluid, and resist that also are highly uniform and transparent. Progress is being made, he reported, but too slowly to satisfy IMEC, which needs to be at the leading edge. Reducing wavelength (λ) today means bringing EUV online swiftly with low-roughness resists developed using EUV interference lithography. However, in van den Hove’s opinion, the lowest risk approach was to reduce k1 below the single exposure limit of k1=0.25 (for equal line-space patterns). That can be done using two separate resist films and two exposures. The lowest value he reported was k1=0.14, which would correspond to 21nm CD at λ=193nm and NA=1.3, but with undefined CoO.

In a brief commercial message, Charles Pieczlewski of Sokudo reported that the latest coat development tracks had demonstrated 1nm CD uniformity, more than enough to support ITRS ambitions. A panel of experts from the three major exposure tool companies and Molecular Imprints (representing the next generation) mostly agreed that multiple exposure would keep Moore’s Law alive for the next node, even if the cost of exposures and masks went up. — M.D.L.

Next week, WaferNews will report on tools for immersion lithography and e-beam, new metrology from startup firms, and innovations from companies involving mask substrate tuning and automating OPC.

by Dr. Paula Doe, Contributing Editor

The Technology Innovation Showcase at SEMICON West spotlights companies that are working on innovations across the chipmaking process line. Among this year’s crop are a Swiss company controlling the beer flow at the World Cup stadium that thinks controlling slurry flow will be less demanding, and a trio of small companies among the crowd of metrology startups that are pushing radical new approaches to thin film metrology, claiming significantly better results from massive numbers of fast measurements, ultra-short wavelength light sources, or inductive instead of optical systems. Meanwhile, Cabot Microelectronics is touting a new tungsten slurry for better yields at 45nm.

Digmesa, from Ipsach, Switzerland, is a major supplier of mechanical flow sensors for coffee makers and beer dispensers for the likes of Starbucks and the World Cup stadium in Munich. Now, it’s also entering the semiconductor market with an ultrasonic flow sensor that avoids the usual turbulence by using a straight flow path, instead of the conventional U- or Z-shaped collinear system. The system instead uses a structure rather like a fish ladder, and mirrors to create a diagonal path within a rectangular measuring section, in a one-piece PFA body, for what the company claims is higher accuracy at the significantly lower cost of under $1000. First application will likely be CMP slurry. “The accuracy and linearity in the semiconductor market is far below that in the beer market,” said general manager Volker Liedtke. “The beer market is much more accurate. We wondered, why is the semiconductor market satisfied so fast?”

The unit has been beta tested, and company plans to produce 20-50 units after SEMICON West for user feedback on what sort of analytics should be added, with commercial production slated for some time in 2007. Liedtke says two major chipmakers have asked for exclusive rights, but his company has declined. “The semiconductor market for us is like a sport,” he notes. “We don’t rely on this market — it’s just to show that we’re the best in measurement.”

Several small companies all claim to have big improvements to offer in measuring ultrathin films, from widely varying new approaches. Filmetrics of San Diego, CA, says it can do much faster and cheaper spectral reflectance metrology by taking thousands of measurements and then disregarding most of them, instead of trying to precisely find and measure the one right spot. Instead of taking the time to match a microscope video to a file image and then align the stage with micron precision, president Scott Chalmers says Filmetrics goes in with a 400×400 matrix of measurement points over an entire 2x2mm region, roughly lines the region up within 100s of microns of the measurement site on a low-cost $1000 stage, takes data at all those points in a split-second flash, then moves on to the next measurement site, leaving a computer analysis to select out the right data points to use. First application has been in CMP. The company is now shipping a tabletop R&D model.

MultiMetrixs, meanwhile, wants to get away from optical processes altogether, aiming to measure multiple parameters of films and bare wafers with what it calls resonance sensor technology (RST). A multipoint sensor monitors how high frequency electromagnetic waves interact with metallic films across the wafer, at thousands of measurements per second. Any change in material properties induces a change in the properties of the virtual sensor/film oscillating circuit, which shifts the resonance pattern. Since the resonance parameters of the oscillating contour can be measured very accurately, the results are highly sensitive (some 100x higher then eddy current sensors), according to president Mark Kessel.

Founded by immigrants from the former Soviet Union, the Santa Clara, CA, company has built a prototype in-line metrology tool for instantaneous multipoint measurement of continuous film sheet resistance, resistivity, and uniformity. It’s been working on several development projects, including with CMP toolmakers on monitoring rate of film removal and end-point detection; solar companies on measuring metal on metal deposition; and a large IC maker on inspecting the wafer edge exclusion zone, and inspecting electrical adhesion of bumps to die.

“We’re working only on conductive materials now,” said Kessel, “but we can do dielectric films inspection too. We can see submerged particles underneath the dielectric film.”

Metrosol‘s approach is to use a shorter wavelength light source for its thin-film reflectometry system, leveraging the material’s optical response at vacuum ultraviolet (VUV) wavelengths for sensitivity and the measurement capability not possible at DUV wavelengths. The Austin, TX company targets measurement of ultrathin film thickness, of SiOxNy and high-k film composition, and of optical properties and fluid/window contamination for lithography.

Although the primary aim is to introduce new ideas from less well-known companies, the committee of volunteers that select the TIS showcased new technologies also picks a few innovations of interest from larger companies, to cover the whole landscape. This year that includes a new pair of tungsten slurries from Cabot Microelectronics for the 45nm node that use new abrasive materials to reportedly reduce erosion and defects by 80%, compared with the company’s own widely used current products. “Current products may not be extendable without a stepwise reduction in erosion and defects,” said David Li, global business manager. “And because of the diverging needs of our customers, we’re replacing one common product with two.”

One of those versions replaces the usual fumed silica abrasive with a softer colloidal particle, and is tunable for either tungsten or oxide. So after tungsten removal it can then be used for oxide buff on the same platen and pad, significantly saving on cost and time. The other version coats the fumed silica particles with a softer polymer etch inhibitor for a gentler removal process. Both reportedly minimize edge-over-edge erosion, or “fang,” and limit wafer erosion to less than 100?. Li says both products are in use in the early commercial stage, with many customers sampling and in qualification. — P.D.

SEMICON WEST PREVIEW
Expanded innovation showcase spans gamut from desktop e-beam generation to measuring low-k stacks

By Dr. Paula Doe, Contributing Editor

It may be getting harder, but plenty of folks are still coming up with bold new ideas to break into the semiconductor equipment business.

Once again, visitors to SEMICON West will have the opportunity to conveniently meet with a range of entrepreneurs with new ideas. This year SEMI is expanding its Technology Innovation Showcase to three separate and more focused areas — one devoted to innovations in DFM and frontend processing, one to MEMS and nanotechnology, and one specifically to final manufacturing technologies.

“We were looking for people who were thinking outside the box,” said Ron Leckie, president of Infrastructure Advisors, one of the judges among a volunteer committee of industry executives. The committee demanded data that showed the technologies worked, but many of the companies are still looking for experienced partners for help developing applications. Others are more established companies with significant new technologies ready for market.

What could a fab do with a desktop e-beam generator? Advanced Electron Beams Inc. has a compact field-emission unit already used by other industries, and is now gearing up to develop applications for the semiconductors, such as curing thick photoresist without heat damage, or point-of-generation destruction of volatile organic compounds, or maybe even trying projection e-beam lithography again. “We think it will allow the semiconductor industry to think in new ways to do some new things,” said director of marketing Anne Testoni. “We’re looking for partners to help develop them.”

Key to the system is a very efficient small solid-state power supply, and some classic electrostatics. A keg-sized hermetically sealed vacuum can forms an electrostatic lens that directs electrons from a heated tungsten filament out of windows in a flood. It generates a shower — not a point source — of beams up to 150kV.

The seven-year old company, based in Wilmington, MA, has sold 90 of the units so far, to 40 different customers, mostly for curing polymers in the printing and packaging industries. In the last year it has closed on $12.5 million in venture capital, jumped from 10 to 35 employees, and brought in a bunch of equipment industry veterans to lead the company to new markets.

Actinix, Scotts Valley, CA, has a solid-state alternative for a excimer 193nm laser. Initially developed under an NSF grant as a stable source for the company’s planned phase-measuring microscope for photomask metrology, the simple system for making a high-quality beam with usable speed and power (5kHz, 10mW), without the gas maintenance issues of an excimer laser, has generated interest on its own. Now a major chipmaker is working on joint development of a version for evaluating immersion photoresist. First beta versions are slated to ship in the fall.

“The advantage is its simplicity,” says CEO Jim Jacob, defining the system as “only crystals and mirrors.” It utilizes an improved optical parametric oscillator, which is naturally narrow band, for efficient frequency mixing, allowing a simple architecture with few optical elements. A standard Nd:YAG pump laser beam is split and converted to UV and IR frequencies, through a cesium lithium borate crystal and the optical parametric oscillator respectively, which are then combined through a sum-frequency mixer crystal of beta-barium borate (BBO) to create the 193nm beam.

Another small company, better known for depositing superconducting films, says it has a way to do non-contact electrical test of low-k dielectrics through the deposition process — before there’s any metal. Neocera, Beltsville, MD, makes what’s essentially a parallel plate capacitor to measures the capacitance between the probe and a bottom layer of the structure, using a high-frequency (4GHz) signal that can measure across the air gap. At high frequencies the impedance of the measured film is comparable to that of the air gap, so a calibration can extract out the electrical properties of the film.

Innovations also are coming from more established players. Accretech USA, a subsidiary of Tokyo Seimitsu, aims to replace wet cleaning with a flame-assisted chemical etch that removes film residue from the wafer edge, with an initially developed application for removing polymer. “Wet chemicals can’t dissolve polymer, they have to undercut it to flake it off,” according to SVP Dave Duncavage. “Ours is the only technique that vaporizes the polymer.”

The new approach uses a needle-sized torch to direct reactive gas to a precisely controlled region on the wafer, without the need for masking, and limits heat damage by controlling the wafer’s rate of rotation through the flame. The beta version has been tested for BEOL ILD bevel polymer removal, and the company is now getting ready to ship a commercial model with throughput of 50 wafers/hour. The process also could remove BARC, resist, tantalum and dielectric films, according to the company, which is showing AFM pictures of resist with an atomically smooth edge after cleaning.

Startup RASIRC aims to replace the torches now used to combust pure hydrogen and oxygen to make ultrapure water vapor for wet oxide growth in diffusion and RTP by filtering steam instead. The system boils de-ionized water, then sends the steam through a hydrophilic membrane filter, which effectively removes metals, organics, urea, and dissolved gases. Eliminating the need for pure hydrogen and oxygen could bring significant cost savings, to say nothing of eliminating the occasional explosion. Company president Jeffrey Spiegelman sees eventual potential for purified steam for single-wafer cleaning as well, as steam could quickly penetrate deep features. The San Diego, CA-based company has one system in the field so far, and plans to ship several commercial systems in the next few months to both fabs and OEMs. — Dr. Paula Doe, Contributing Editor

This Week in Packaging


June 20, 2006

Intel is opening a design and development center in Malaysia, in close proximity to its assembly and test function facility. The center focuses on chip and board design, which allows for synergy with the nearby packaging facility. SanDisk will be opening a packaging and test facility in Shanghai by the end of this year. You don’t hear much about SanDisk’s packaging capability, but given SanDisk’s success in recent years, they must be doing something right.

(June 21, 2006) SAN JOSE, CA &#151 For more than 20 years, Positio Public Relations has hosted an annual event for media, analysts, and senior industry executives at SEMICON West. This year’s theme&#151SanFranVegas, Baby!&#151combines Las Vegas glitz with San Francisco chic. The invitation-only event is for senior management of approved clients and guests and accredited media and analysts. CFOs, CEOs, and editors are expected to attend. It will take place Tuesday, July 11, 7-11 pm) at the Four Seasons Hotel in downtown San Francisco, two blocks from the Moscone Center.

(June 9, 2006) SAN JOSE, CA &#151 A comprehensive discussion of the semiconductor supply chain will be presented at the U.S. Technology Symposium on July 10th, with industry experts from Motorola, Hewlett-Packard, Intel, Samsung, Cadence, Prismark Partners, and Tessera speaking. The symposium &#151 taking place the day before SEMICON West opens &#151 is structured to offer a broad view of the technologies and trends driving the future of electronics miniaturization and performance.

(June 9, 2006) TAIPEI, Taiwan &#151 Akustica announced a joint venture with Ricoh Company, Ltd., to develop a camera module solution using AKU2001, a digital output microphone chip. The companies expect the collaboration to speed time-to-market production on video and voice over internet protocol (VVoIP). The camera module will be used for universal serial bus (USB) audio/video (A/V) applications. James Rock, president and CEO of Akustica, cited real-time-communications programs as the impetus for developing chips with VVoIP applications.

A SEMI Market Symposium keynote on July 10th, titled “Design for Manufacturing: Changing Future Directions in Semiconductor Manufacturing Equipment Cost and Capability,” will feature Wally Rhines, Mentor Graphics’ chairman and CEO. Laurent Bosson, executive vice president of front-end technology and manufacturing at STMicroelectronics, will deliver the opening keynote address on Tuesday, July 11th, at 10:00am.

(June 1, 2006) Hong Kong and Pleasanton, CA &#8212 ASAT Holdings Limited will celebrate its new manufacturing and testing facility opening in Dongguan, China, on Monday, June 12, 2006, beginning at 9:30 a.m., when Robert J. Gange, ASAT’s president and CEO, will join local dignitaries, customers, and employees in a grand opening ceremony.

ASAT anticipates that Dongguan facility will deliver higher yields, improved time-to-revenue results, and more efficient operations, according to Gange. ASAT closed its Hong Kong assembly operations in early May, and expects to wrap up the move to Dongguan by late June. “With essentially all of our manufacturing now in Dongguan, we will have a much leaner cost structure, resulting in substantial savings in our labor and selling, general and administrative expenses,” says Gange. “Our expectation is that some of the cost savings will be captured in our July quarter results with the majority of savings coming in the October quarter.”

The 560,000-sq-ft. facility is located in the Zhen An Hi-Tech Industrial Park in Dongguan, which is about 90 minutes from Hong Kong.

The partnership is intended to couple FCI’s high-volume, ultra-fine-pitch wafer bumping capabilities and 2-D wafer-level package portfolio with Engent’s flip chip assembly and surface mount technologies. The outcome is expected to be a flexible technology platform that will support a range of high-volume, IC package applications, 3-D integration of emerging integrated passive device technologies, and MEMS devices.

(May 31, 2006) San Jose, CA &#8212 This year’s SEMICON West 2006, to take place July 10–14 at the Moscone Center in San Francisco, CA, will feature many keynote presentations, as well as a selection of short courses sponsored by IEEE/CPMT, Pinnacle Training International (PTI), SEMI, the International Society for Optical Engineering (SPIE), and the Standards Technology Group (STG). Scheduled keynote speakers are executives hailing from STMicroelectronics, Micron, Mentor Graphics, Xilinx, LogicVision, and Surfect Technologies. A series of Standards Technical Education Program (STEP) courses round out the program.