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January 18, 2010 –  A quick highlight list of Intel’s blowout 4Q09 numbers, released after markets closed on Thursday 1/14:

– Revenue $10.6B, up 13% Q/Q and 28% Y/Y
– Net income $2.3B (includes $1.25B settlement with AMD), up 23% Q/Q and nearly ninefold from 4Q08
– Gross margin a record 64.7%, up 7 points from 3Q09 and 11.6 points vs. 4Q08. (FY09 margins 55.7% were flat with 2008)

And its outlooks for 1Q10:
– Sales down  to $9.3B-$10.1B
– Gross margins slipping to 59%-63% (58%-64% for FY10) — partly attributed to seasonal declines, partly to costs with ramping up 32nm manufacturing. ("Those early wafers tend to be pretty high cost products and as you have seen us do in prior transitions of new process technology we pretty quickly build inventory on the new stuff," CFO Stacey Smith noted during Intel’s analyst/investor Q&A .

And spending outlook for FY10:
Capex: $4.7B-$4.9B, up about 6% from $4.5B in 2009. (Intel’s early 2009 capex prediction started at $5.2B)
– R&D spending about $6.2B

Notable comments during the Q&A:

Inventories: "I expect to build a little bit more inventory in 1Q as I ramp 32nm products. It won’t be the same magnitude we saw this quarter but it will be up some. Then it starts looking a little more normal as it progresses through the year relative to demand." [CFO Stacey Smith]

"[…] Looking at our authorized channel those inventories are down and visibility into a lot of the OEM inventories and a lot of that is now held in our hub and what we see in the down channel so retail, the shipping lanes and stuff, what we see is a healthy level of inventory relative to the demand we see out over the next couple of quarters." [Smith]

"We are in the sweet spot of [factory] loading. We are running nicely full. We have the ability to respond to some upside. We always want to have some of that but we are full to the point we are getting really good cost results. I would expect that to be the norm for this year." [president/CEO Paul Otellini]

"What we are doing with this cycle in general is using the technology to move 32 nm into the mainstream more quickly than we did with 45. The rate of crossover between 32 and 45 will be more a function of second half demand in total than capacity planning to cut one off versus the other. If demand is red hot the transition will be slower even though we will ramp 32 as fast as possible and if it less red hot it will be slower." [Otellini]

Capital spending: "As a result of capital reuse and achieving efficiencies we were able to ramp 32nm process technology and still bring down our capital forecast from our expectation at the beginning of the year." [Smith]

"[…] We are making some investments in R&D projects this year. We have had five years in a row of year-over-year employment decline. We will actually grow employment a little bit in 2010. So you haven’t seen that from us in a long time. We have some high return on investment projects where we are going to go and make some incremental investments." [Smith]

What analysts say:

Craig Berger, FBR Research: There are likely two small issues for investors here. First, management’s 2010 gross margin guidance of 61% seems conservative vs. its 61% guidance for 1Q10 and versus the 65% Intel just reported. We believe management could raise this annual margin target later this year. Second, internal inventories went up, largely due to valuing 32nm inventory, but also due to management’s view internal inventories are too low. With another planned increase in internal inventories in 1Q, the bears may say this is the beginning of the end of this cycle for Intel. We respectfully disagree with those sentiments.

Ben Pang, Caris & Co.: "The strength of Intel’s core business bodes well for the anticipated capital spending rebound in 2010 and beyond." […] KLA should benefit from the more stringent defect requirements [for Intel’s latest silicon technology], while both NVLS and VSEA have demonstrated strong market share position at Intel."

Doug Freedman, AmTech Broadpoint: "We believe the gross margin impact on INTC’s manufacturing efficiencies at 300mm continue to be underestimated. […] We note that capex increased only 7% Y/Y to $4.8B despite China fab investments. […] We believe that FY10 gross margin guidance of 61% ±3% (the same level as 1Q10) is conservative given higher revenue levels and ramp down of 32nm start-up costs."

January 13, 2009 – Attendees at this week’s Industry Strategy Symposium (ISS) have heard plenty of good economic news. Forecasters are predicting two or more good years of strong growth for the semiconductor industry amid a rebounding global economy. Analysts see growth in PCs, digital cameras, video recorders, DTV, servers, video games, and cell phones, along with strong growth in China and India.

Along with this buoyant optimism, however, comes a recognition that the semiconductor is undergoing a fundamental change in structure that will leave only a handful of companies producing devices at the leading edge. Bob Johnson, VP of research at Gartner, predicts that by 2014 there will be only 10 companies operating at the leading edge: 1-2 nonmemory IDMs, 4-5 memory companies, and 3 foundries.

That sentiment was echoed by Handel Jones, CEO of International Business Strategies, who predicts "significant changes" over the next 5-10 years, both in terms of the structure of the industry and its cost structure. By the time the 22nm generation rolls around in 2012, he predicts there will be only three IDMs: Intel, Samsung and STMicroelectronics, and in terms of foundries working at 22nm, he thinks TSMC and GobalFoundries (which recently acquired Chartered Semiconductor) will be around. The fate of Samsung, which recently entered the foundry business, will depend on the success of their model, he said, adding that SMIC is an unlikely participant, and the capacity of UMC is "unclear."

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A similar situation exists in the memory market. "What we see today is a number of companies the DRAM business, in NAND flash and NOR flash business, but if you look out two to five years, you’re going to have one or two companies and that’s it," Jones said. Samsung will again be a major player, with a projected 50% of the DRAM market and 60% of the NAND flash market. "What we see now is Samsung moving ahead very rapidly and the others falling behind. The gap is widening," he said. Toshiba is a distant second, at least in NAND flash, where Jones expects them to garner 30% of the market.

One of the main drivers behind this consolidation is price pressure. "The semiconductor industry, even though it’s recovering from a revenue perspective, is not healthy from a profit perspective," Jones said. "Today, a relatively small number of semiconductor companies are making good profits. The market in 2010 will be comparable to the market in 2007 from a revenue perspective. Unit volumes though are up about 20-30%, so we’ve had an erosion of prices by 20%-30%. We’ve had some efficiency improvements but we’ve also seen a loss in gross profit margin and also a loss in operating income."

Jones believes this will result in "a significant restructuring" in which "only the top two or three companies in specific markets will survive." The drive from 32nm to 28nm will force additional consolidation, he added.

A similar type of consolidation is seen on the front-end semiconductor manufacturing equipment front (less so on the back-end test and packaging side). Gartner’s Johnson said that equipment suppliers will have "lost" about $116 billion in revenue between 2007 and 2014 due to the recession and record low levels of capital expenditures. This equates to about $17.4 billion in lost R&D.

This is happening at the same time when R&D costs are escalating due to a demand for continued shrinks, more advanced device structures and even a move to 450mm wafers (which continues to be a hotly debated topic).

Many believe this consolidation and funding gap has the potential to stop Moore’s Law dead in its tracks, perhaps at the 22nm generation. Jones said that the benefits of scaling, which he measures in terms of cost per gate trend, are not what they once were. The move to 90nm achieved a big cost decline in cost per gate, in part due to the transition from 200mm to 300mm wafers and associated productivity gains, he said. The move to 65nm brought "a fairly reasonable" decline, and then a small decline with 45nm and 32nm transitions. With 22nm, however, he said there actually will be an increase in the cost per gate — and without a reduction in cost per gate, many will question the need to move to the small feature dimension. "When you look at what applications drive the technology, if it is low-power (such as for handsets), that’s a cost-driven market," Jones said. "Maybe going to a smaller dimensions will not give you the required payback."

One bright spot: through-silicon vias (TSV) and 3D integration, which have the ability to increase functionality equivalent to a move to a new technology node. "In the past we were very cautious on TSV. We’ve become a lot more positive," Jones said.

As a result of increasing costs, Jones also sees a reduction in the number of designs at advanced technology nodes. He said for a 28nm design, the costs can easily be in the $100M-150M range, and if you add software it can be up to $200M. "If you look at the normal metrics for R&D, you need 10× revenue from a production point of view. You then need $1.5 billion in revenue — and of course that happens in only a small number of products," he said. "After 22nm, the technology gets even tougher. The two year cycle is fading fast."

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Bob Bruck, VP of Intel’s technology and manufacturing group and GM of technology manufacturing engineering, added during a panel session that the number of fabs built each year has been declining: less than ten are expected to be built in 2011 and 2012, respectively (the majority of those being 300mm fabs). "Obviously this stuff is expensive," he said. The cost of a fab is about $4B, a pilot line costs $1B-$2B, and an advanced R&D process team can cost $500M-$1B. "You’ve got to have a large TAM to support this kind of investment, and you’ve got to have a pretty good gross margin on the product base to support this kind of investment," he said. "These types of dynamics are shaping this consolidation effect."

All this means the major fragmentation is widening between those that have and can afford the most advanced-node technology, and those who don’t/can’t, Jones said. "Those two segments are radically different and they’re going to get even more different." But despite that rift there’s still growth for those who choose not to push ahead to the advanced nodes. One group of companies is doing 45nm and now starting 32nm and 22nm, "we’re talking maybe 10 companies globally," he said. Another grouping of "hundreds of companies" are staying at wider feature dimensions, where "you actually have pretty good growth." In fact, he expects to see capacity shortages for some of these lagging feature dimensions in the next few years.

by Pete Singer, editor-in-chief, Solid State Technology

January 12, 2009 – Economists at the Industry Strategy Symposium (ISS) painted a positive picture for the semiconductor industry for the next few years, and for the economy in general.

Economists believe it is still too early to predict the fallout from the worst global recession in the last 63 years (the previous one being the Great Depression in the ’30s). Robert Fry, senior associate economist at DuPont, said the recession is "probably over" after hitting a trough in June of 2009; 7.2 million jobs were lost in the recession that lasted at least 18 months. But the stock market is up 60%-70% since hitting bottom on March 9, 2009, he added. Duncan Meldrum, who was chief economist at Air Products for many years (now at IHS Global), said we are in the early stages of recovery. "There’s a grumbling acceptance of the environment," he noted. "It’s a long adjustment process and it’s going to take a long time for credit markets to open up."

Click to EnlargeMeldrum did sound one cautionary note: He said that after major recessions in the past, the US government has created a "super-regulatory" institution, pointing to the Federal Research Board in 1907 and the SEC in 1929. He believes the creation of another such institution is possible, but if that happened it would only aid the semiconductor industry by stabilizing markets that are heavy consumers of electronics.

Macroeconomists claim they do not see the dreaded "W"-shaped recovery happening, in which today’s recovery would be short-lived and followed by another recession. They are also not overly concerned about inflation, although that will depend on how the Fed acts when the recovery starts to heat up. Instead, the main fear is the risk of a "square root" type of recovery, in which a sharp recovery would be followed by a long period of flat growth. They said the most likely scenario is one similar to past recoveries after major recessions, which is best described by a "V."

Fluctuations in the housing market are likely to continue, predicted Fry: "A lot of markets tend to overshoot when they are aiming for equilibrium." He expects housing prices to continue to fall but then rebound to equilibrium levels.

Speakers noted that the stimulus money from governments has largely not yet been spent, which will continue to boost the economy. Stimulus packages include $2 trillion in the US, $600 billion in China, and $35 billion in Japan. China recently said that it would continue to move forward with its stimulus spending despite a brightening economy; the fear was that it would not.

All this is good news for the semiconductor market. Many speakers pointed to the rising standard of living in many developing parts of the world, and a general human propensity to devote whatever disposable income they have to electronic gadgets such as televisions and cell phones.

Bill McClean of IC Insights offered some extreme optimism, noting that historically global recessions have not been times of reduced demand, but instead pent-up demand. PC sales were flat during the worst global recession in 63 years, and cell phone sales were down only 5%, he said — so he’s predicting a "boom" year for 2010 that will continue into 2011. Leading-edge capacity is already at around 97%, which will raise average selling prices, he added.

The lack of present capacity was countered later on in the day, however, when Norm Armour, VP and GM of GlobalFoundries’ Fab 2, held up a hand-lettered sign during his presentation, saying simply: "For sale: 300mm capacity."

January 8, 2009 – Taiwan’s top two foundries both posted December sales that were up a few percentage points from the prior month, and more than double that from the same period a year ago.

Though neither company provided commentary on their results, it’s clear that business swung into overdrive in late 1Q/early 2Q, and stayed fairly consistently positive through the year.

Another interesting metric: at the start of the year, UMC’s sales were just 25% that of rival TSMC; by year’s end they had risen to about 30%, suggesting the company enjoyed a faster pace of recovery (but not necessarily a direct marketshare steal).

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December revenues in US $M (TSMC results are consolidated). Total % difference is vs. 2008. (Source: Company data)

 

December 28, 2009 – After slumbering for the past year, the industry is ill-equipped to handle surging chip demand heading into 2010 and beyond — and tightened capacity will spell the end of the fab-lite model, predicts analyst Malcolm Penn of Future Horizons.

IC unit shipments surged "a staggering" 22.8% in October from just the previous month (September 2009); moreover, chip ASPs were up >5% in October vs. a year ago, considerably stronger than Future Horizons’ prediction of 3% growth for all of 4Q09, Penn notes in a new report. "It is now very difficult to see anything less than a 20% growth year for the semiconductor market in 2010" (Future Horizons’ most recent outlook pegged 22%), based on current industry momentum followed by "a very average quarterly growth pattern," he writes.

And in fact, he notes, it’s already looking like that 2010 growth number might be too low. The "weak" link between the global economy and semiconductor sales means the chip industry could surge even as regions muddle through economically, he suggests. To meet the WSTS’ fall forecast of 0.5% flatness in 4Q09, November and December must both put the brakes on vs. October, suggesting a market peak already has been reached — but "quite the opposite in face, there is every reason to believe that the market is strengthening, not weakening," he writes. And from this to assume predictions of "only" 12% growth in 2010 would require quarterly growth (1Q, 2Q, 3Q, 4Q) of -4%, 0%, 8%, and 2.5%. "There is no company out there experiencing or forecasting this kind of an outlook," he notes.

Much more likely, Penn writes, is that we will see "much stronger quarterly growth rates" than currently assumed, especially if prices firm up due to inventory shortages, increased lead-times, and product allocation. "We remain absolutely convinced that the industry has lulled itself into a false sense of security," he warns, extending into 1H10 and "to collapse with a vengeance under the second half-year’s strength, by which time it will be impossible to do anything about it." Assuming there is not another major economic crisis, numbers indicating the market recovery "have never looked as strong."

The underlying culprit, Penn says, is the drying up of capacity to "ludicrously low levels" of capex in 2009, and likely "no significant increase anticipated until mid-2010." Chipmakers demonstrable slowdown of capacity additions starting in 2007 (before the recession started) has left MOS capacity at levels from early 2007, Penn writes (citing SICAS data). Thus, with an inability to address building demand in late 2009 and inventories unreplenished since their year-end 2008/early 2009 purge, means "we are now condemned to enter 2010 with tight fab capacity and no excess stock," he says.

The result is a looming fab shortage and breathlessly-tight capacity not just into 2010, but extending to least the early part of 2011. "There will not be enough 2010 capacity in place to meet demand, [and] 2011 will be even worse," Penn warns. And anyone without direct and controlling access to capacity will be left out in the cold. "It will kill the fashionable — but fundamentally flawed — fab-lite strategy stone-dead," he predicts.

Penn’s year-end/opening advice to chipmakers and chip procurers: "By all means plan your budget and operations for a modest growth year — but you [had] better have a more aggressive Plan B in your back pocket."

December 22, 2009 – Preliminary rankings for 2009 worldwide semiconductor sales not surprisingly show a lot of declines, but not as much as had been feared as recently as just a couple of months ago — and some firms will even eke out positive growth by year’s end, according to data from Gartner.

The firm now projects an -11.4% decline in chip revenues to $226B in 2009, making it a historic two-down-years-in-a-row after 2008’s ~-4% dip — but that’s better than its late-August prediction of a -17% decline to $212B and well ahead of its early-midsummer outlook of $198B/-22.4%.

Among the top vendors (ranked by sales), only Samsung, Hynix, and Qualcomm are expected to eke out any growth in 2009, and just barely — the two Korean firms thanks to finally-firming memory prices, Qualcomm thanks to higher marketshare in cellular baseband processors, noted Gartner analyst Steve Ohr, in a report. (Outside the top 10, Taiwan’s MediaTek achieved double-digit growth [21.4%] thanks to its inroads in Chinese cellphone makers.) On the other end of the scale: Infineon (-46%, due to memory losses and sale of it wireless unit — even discarding that unit, still a -27% slide); Renesas (-20%) and STMicroelectronics (-18%) also saw chip sales sink more than the overall industry. Japanese companies in particular were hard-hit this year by the added weight of a strong Yen on top of the world recession, Ohr noted.

"With the market emerging from recession, semiconductor vendors need to track the end users’ spending patterns through 2010 in order to detect any disruptions in demand — or additional demands that outstrip capacity," Ohr advised. It’s also important to understand the timing of recovery in various sectors, which impacts different vendors, he noted. The PC segment was the first to spring back, followed later in the year by other segments reflecting consumer sentiment, like cell phones and automobiles. Enterprise spending was most deeply impacted by the recession and remains slow to recover."

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Top 10 worldwide semiconductor vendors, ranked by US $M of revenue. (Source: Gartner)


December 11, 2009 – Scientists at MIT’s Microsystems Technology Laboratories say they have built multiple transistors using III-V materials (in this case, InGaAs) with different gate lengths to figure out optimal conditions for making a logic element, and a pathway to make them smaller and better.

Two of their four papers presented at this week’s International Electron Devices Meeting (IEDM) updated work a year ago building a III-V transistor with record high-frequency operation, addressing properties of that transistor that better predict its performance as a logic element. They built chips with identical multiple transistors except for their gate lengths, and by comparing the chips’ performance at different frequencies were able to determine electron velocity through the transistor and electrostatic force exerted by the gate on the semiconductor layer.

The electron velocities they calculated, according to Jesús del Alamo, research team leader and MIT professor of electrical engineering, were "easily two and a half times higher than the best silicon transistors made today," and while the electrostatic force was lower than had been hoped (which del Alamo characterized as a "manageable problem"), the precision with which it was calculated will aid development of better physical models of III-transistors. While the MIT prototypes were built entirely with III-V materials, he envisions device structures incorporating "a silicon-like technology" (e.g. InGaAs) under the gate.

A third MIT paper presented at IEDM applied the team’s prototype measurements to work at Purdue, where simulators have been developed to model performance of even smaller III-V transistors. A fourth paper proposed a new design for III-V transistors that would work better at smaller scales by permitting a thinner layer of material to separate the gate and underlying semiconductor material, according to del Alamo.

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A test chip used to evaluate the performance of indium gallium arsenide in logic circuits. (Source: MIT/the del Alamo group)


November 30, 2009 – Chip sales continue to grow stronger, and the historically busy holiday-ramp period of October proved to be that again, according to the latest data from the Semiconductor Industry Association (SIA).

Worldwide semiconductor sales in October totaled $21.7B, up 5.1% from September and down just -3.5% from a year ago, roughly when the industry really started to nosedive. (September’s Y/Y decline was a full -10%) Best growth during the month came from Europe (7.5%) this time, though the Americas region (5.9%) continues to stay above overall growth, with Asia-Pacific (4.9%) just behind the curve, followed by Japan (3.3%).

Compared with a year ago, the Americas region continues to push ahead, now 14.1% ahead of the pace a year ago; the Asia-Pacific region (-1.3%) has nearly regained its footing, and Europe (-11.6%) continues to march back. Year-to-date, total chip sales are off by about -20% from a year ago, with the Americas (-11%) well above that curve, and Europe (-31%) and Japan (26%) on the trailing edge. The three-month moving average ended in October showed ~16%-20% across all regions.

(The SIA’s actual chip sales, no longer made publicly available, indicate slightly better year-to-date sales of $180.0B, down roughly -16% from the same period in 2008.)

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October is typically a supply-building month for the semiconductor industry as it prepares for holiday sales of devices; given the tough times earlier in the year, inventories have been stretched tight, which means the build season could extend another few weeks, noted SIA president George Scalise in a statement.

The WSTS’s recently revised year-end forecast for 2009 is about -11% below 2008, improved from the midyear projection of a >20% decline. The SIA hints that year-to-date sales (Jan-Oct) were $180B; if we assume the numbers in November and December will stay safely above $20B — and the suggestion now that the build period could extend several weeks seems to assure this — then 2009 chip sales would end the year at roughly $220B vs. 2008’s $248.6B, more or less the same -11% decline that the WSTS now projects. (Tallying the 3-mo. averages per month shows a slightly less rosy picture, roughly a -16% decline from 2008.)

Of course, the key unknown still is what happens with holiday demand. Initial data from the traditional Black Friday post-Thanksgiving shopping period suggests a little better consumer spending than a year ago — but it still remains to be seen whether there is solid economic confidence, to be borne out by electronics devices whisked off shelves, or cautiously left to gather dust and force an inventory burnoff after the holidays.

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November 19, 2009 – With the pullout of proposed investor Hyosung Corp. (citing "groundless rumors," including possible government favor), creditors of Hynix Semiconductor are looking to push ahead with a sale, even if a public sale doesn’t work out, according to local reports.

The state-owned Korea Exchange Bank (KEB), representing other Hynix shareholders, had lined up smaller domestic conglomerate Hyosung (which has no background in memory chips) to take a ~28% stake worth about $3B. But last week Hyosung said in a filing with the Korea Exchange that the process had become impossible to achieve given "baseless criticism" about favoritism toward it — fueled by creditors’ willingness to unexpectedly extend the bidding deadline, and their willingness to only part with part of their ownership stakes.

The fallout of Hyosung’s departure likely means Hynix’s creditors will likely try to sell down their shares in smaller chunks, "perhaps by 6-7 percentage points, through next year while the sale process goes on," said Lee Min-hee, an analyst at Dongbu Securities, quoted by Reuters. Having a domestic owner — perhaps even publicly owned, like steelmaker POSCO — also is seen as a favored outcome.

And now reports are surfacing that Hynix creditors may indeed try to get rid of their stakes piecemeal by pursuing a "block deal" — i.e., selling shares to major investors on the market — if the public sale option doesn’t materialize, in order to take advantage of the more favorable conditions as the memory market gains steam. A decision is due by late November; open bids would be held if three-quarters of shareholders support the measure, and letters of intent from buyers would be accepted by Dec. 15. If no buyer materializes, creditors would likely seek to unload stakes in bigger chunks than originally planned, noted officials cited by Reuters.

A block sale would not necessarily solve things, though. "If a block deal becomes a reality, a possible overhang issue will likely weigh on Hynix shares for a while," said Kim Hyun-joong, analyst at Tong Yang Securities, quoted by Dow Jones. And several reports local and international noted that if no deal is achieved relatively soon, it may get tougher to attract potential investors — the KEB has plans to sell several state assets over the next couple of years.

November 16, 2009 –  Semiconductor consortium SEMATECH has named Daniel Armbrust as president/CEO effective immediately, succeeding Michael Polcari who after nearly seven years in the position becomes board chairman.

Armbrust, a 25-year vet of IBM, most recently was VP of 300mm semiconductor operations at the company’s facility in East Fishkill, NY, and previously held positions related to process development, manufacturing, and client engagement.

"Dan has the right blend of talents for the job," notably "ability to lead top performing teams, his strong credentials in both R&D and manufacturing, and his experience in driving strategic alliances," according to Polcari, in a statement.