Device Architecture

DEVICE ARCHITECTURE ARTICLES



TEL orders improving, plant back on track

12/04/2009 

Tokyo Electron Ltd. has raised its expectations for chip tool orders in the current quarter, and reportedly will resume plans to build a new factory near Sendai, according to local reports.

Samsung uncrates 30nm 3-bit MLC NAND

12/03/2009 

Samsung says it has ramped to volume production on a "30nm-class" 3-bit multilevel cell (MLC) NAND flash memory and an asynchronous DDR version, to be used in modules initially for 8GB microSD memory cards.

Building CNT circuits on DNA origami "breadboards"

12/03/2009 

Researchers at the California Institute of Technology have combined the self-assembly ability of DNA with electronic properties of carbon nanotubes to address the problem of organizing CNTs into nanoscale electronic circuits.

X-Fab sells UK site to Plus Semi

12/01/2009 

X-Fab Silicon Foundries Group has agreed to transfer ownership of its wafer fab in Plymouth, UK, to Swindon, UK-based Plus Semi, reuniting two former Plessey operations and avoiding feared shutdown/layoffs.

HP's Stan Williams: Hybrid CMOS-memristors, the future of analog

11/30/2009 

Giving the keynote address at the Silicon Valley Engineering Council's Nov.10 open house, HP senior Fellow Stan Williams discussed research by his group and others on memristors, and hinted on upcoming developments in this area.

Gartner: 2008 chip levels in 2010

11/17/2009 

Gartner has added its updated chip forecast to the chorus of renewed optimistic outlooks. The firm is reducing its 2009 decline expectations to -11.4% (vs. -17%), and says 2010 chip growth will bounce back 13% to 2008 levels of $255B.

Report: "Astonishing" evolution in 3D ICs, TSVs

11/14/2009 

Updates to a pair of reports from Yole Developpement aim to help better identify remaining integration challenges and high-volume production implementation strategies for 3D ICs and through-silicon vias (TSV).

Taiwan Memory denied gov't funds; future in doubt

11/13/2009 

Taiwan's efforts to consolidate its memory chip industry have hit another roadblock, with the government's denial of an application for funding -- leaving the future of the effort even more in doubt.

Samsung: R&D moving to 32/28nm foundry process

11/10/2009 

Samsung Electronics says it has begun focusing its R&D on advanced logic process development for its foundry business, leveraging synergies with its memory development and work with partners and consortia.

Analyst: Four chipmakers on pace for 2009 growth

11/10/2009 

The suffocating downturn will make 2009 overall one of the toughest in the industry's history, but four firms are still in position to increase sales from a year ago, based on year-to-date tallies compiled by IC Insights.

Micron sampling new NAND+DRAM multichip package

11/04/2009 

Micron Technology says it is now sampling a multichip package combing its 34nm-based 4Gb SLC NAND flash and 50nm-based 2Gb low-power DDR DRAM memories, a combination it says offers better cost and power savings for mobile devices.

Alchimer: Higher-AR TSV saves $700/wafer

11/04/2009 

A new study suggests that through-silicon vias (TSV) with higher aspect ratios (20:1 or 10:1, vs. 5:1) offer a significant payback by saving space on a die, up to $700 per wafer.

Mentor tips plans for unified Si test, yield analysis

11/03/2009 

Mentor Graphics is launching what it calls a comprehensive test and yield analysis platform incorporating homegrown and acquired technologies, to help customers drill down through failure analysis data to better identify defects and fix them, thus saving time and improving yields.

Intel, Numonyx tip multilayer PCM arrays

10/29/2009 

Intel and Numonyx say they have built a "vertically integrated" 64Mb test chip enabling stacking of multiple layers of phase-change memory (PCM) arrays within a single die, paving the way for devices that can scale well beyond conventional memory with more capacity, lower power consumption, and taking up less space.

Report: Spansion to sell 300mm Aizu-Wakamatsu fab

10/27/2009 

Spansion Japan plans to sell its 300mm/65nm  fab in Aizu-Wakamatsu as part of its bankruptcy reorganization plan, according to the Nikkei daily.

Avoiding ASIC expense and risk with SiCB technology

10/26/2009 

Embedded computing modules employing "silicon circuit board" technology as an alternative to expensive ASIC developments offer advantages in performance and power for integrating memory and logic -- and are a practical alternative to 3D integration due to thermal and supply chain issues, explains siXis' David Blaker.

New transistor noise model helps ID defects in gate stacks

10/26/2009 

Researchers from SEMATECH have come up with a better model to help pinpoint defect characteristics from low-frequency noise data in advanced gate stack transistors, seen as a key step in defect analysis and elimination needed for device scaling.

DARPA project demos wafer-scale graphene-on-Si FETs

10/23/2009 

A DARPA-backed program to develop graphene-based RF circuits with "game-changing" potential for electronics systems has achieved a new milestone: development of graphene-on-silicon FETs at full wafer scale.

Study compares SOI vs. bulk for finFETs

10/23/2009 

Cost and performance between silicon-on-insulator (SOI) and bulk finFETs are "for all practical purposes equivalent," but finFETs are more challenging to manufacture due to increased process variability, according to results from a study from the SOI Industry Consortium.

Researchers create, manipulate new multiferroic materials

10/23/2009 

Researchers from the US have created a new multiferroic material, and another group from the US and the Netherlands say they can control such multiferroic properties -- achievements that have implications in future electronics and particularly memory devices.




WEBCASTS



Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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