01/02/2012 

Art Zafiropoulo of Ultratech shares predictions for 22nm: that everyone will be using gate-last fabrication, that there may be a mid-node at 20nm, and that TSVs and 450mm wafers will play an important role at the new node.

12/29/2011 

The readiness of suppliers to offer 2.5D packaging technologies was in full debate at the RTI 3D ASIP event this month, with presentations and rumors questioning how soon customers will need 2.5D/3D, and whether some offerings are worth the investment.

12/27/2011 

The Global Semiconductor Alliance released "3D IC Architecture: A Natural Evolution," a report sponsored by Macronix International and Etron Technology. GSA also published the 2nd edition of the 3D IC Design Tools and Services Tour Guide.

12/27/2011 

Small, mobile, Internet-connected devices are bucking the slow economy and use advanced packaging technologies to pack an enormous amount of functionality into a very small form factor, notes New Venture Research, which provides forecasts for each advanced packaging device type.

12/19/2011 

Powertech Technology Inc. (PTI) has approved a tender offer of NT$25.28 per share for the common shares of Greatek with a minimum acquisition target of 30% of outstanding shares.

12/15/2011 

Licensing company Rambus Inc. (Nasdaq:RMBS) is engaging with the Industrial Technology Research Institute (ITRI) in Taiwan on the development of interconnect and 3D packaging technologies.

12/12/2011 

SEMI is looking for presenters for technical sessions and other opportunities at SEMICON West 2012, July 10-12 in San Francisco, CA.

12/09/2011 

Honeywell Microelectronics will use Tezzaron's 3D stacking on Honeywell

12/07/2011 

imec is presenting a record number of 17 papers at the IEEE International Electron Device Meeting (IEDM), ending today in Washington, DC.

12/07/2011 

Arteris Inc., network-on-chip (NoC) interconnect IP company, will incorporate its FlexNoC NoC interconnect IP into an SoC die on silicon interposer test chip with TSMC.

12/06/2011 

Singapore's A*STAR IME and 3D IC developer Tezzaron Semiconductor signed a research collaboration agreement to develop and exploit advanced through silicon interposer (TSI) technology.

12/06/2011 

At the recent Global Interposer Technology workshop at Georgia Tech, Xilinx and TSMC discussed 2.5D chip packaging technologies and others touted the potential of glass as an interposer substrate material, reports Dr. Phil Garrou.

12/02/2011 

Using the advanced through-silicon via (TSV) fabrication process at IBM (NYSE:IBM), Micron Technology Inc. (NASDAQ:MU) will begin producing its Hybrid Memory Cube. The companies claim that this is the first CMOS design to go commercial with TSV interconnects.

11/28/2011 

11/28/2011 

Leti

11/23/2011 

The Design Automation Conference (DAC) is soliciting semiconductor industry experts for participation in invited sessions, panels, and other events at the 49th DAC, June 3-7, 2012 in San Francisco, CA.

11/15/2011 

Nanotechnology accelerator SVTC Technologies partnered with SUSS MicroTec on wafer-level packaging for MEMS, and 3D IC bonding technology development.

11/11/2011 

Backside-illuminated image sensors require more precise wafer processing -- uniform extreme wafer thinning, dopant control, epitaxy growth, trench manipulation, etc. -- but the payoff in image quality is significant. Researchers at imec experimented with different wafer fab technologies to make a record BSI sensor. They also consider new architectures/packaging techniques for this technology.

11/10/2011 

OSRAM Opto Semiconductors increased its IR Power Topled with lens optical output by 80% over the standard version by integrating a thin-film chip. The IR LED maintains the same surface area and drive current.

11/07/2011 

SEMATECH has created an online 3D Standards Dashboard, allowing 3D semiconductor and MEMS interconnect professionals to exchange standards activity information.