Lithography

LITHOGRAPHY ARTICLES



Taming the runaway computational demands of advanced lithography

01/12/2010 

Because of the limitations of 193nm lithography, much of the shrink capability comes from computational lithography, with software-driven advancements in optical proximity correction (OPC) and resolution enhancement technology (RET). James Word and Xima Zhang from Mentor Graphics discuss solving the computational load challenges that arise from the industry's increasing complex lithography roadmap.

DARPA asks industry for affordable, low-volume integrated circuit manufacturing

01/06/2010 

Scientists at the US Defense Advanced Research Projects Agency (DARPA) are asking industry to come up with new ways of designing integrated circuits for affordable, low-volume nanofabrication for US Department of Defense (DOD) applications.

Analysis of the effect of point-of-use filtration on microbridging defectivity

12/18/2009 

Microbridging defects have emerged as one of the top yield detractors in immersion lithography at the 32nm node and beyond. This study from Entegris, IMEC, and Sokudo examines the effect of point-of-use filtration and how it is best used to mitigate microbridging defectivity.

ASM, Air Liquide to work on advanced high-k ALD

12/15/2009 

ASM International NV has licensed key processes and material IP to the Air Liquide Group, related to deposition of advanced ultra-high-k insulator films such as yttrium-doped zirconia, STO, and BST, used most recently as gate insulator material in logic manufacturing.

IEDM: Scaling to continue, but with fully depleted "disruption"

12/08/2009 

Scaling will continue to follow the Moore's Law pace and will continue to rely on silicon to the 11nm node and beyond, although the emergence of fully depleted devices will disrupt device architectures, predicted Ghavam Shahidi from IBM research division, in a talk at this week's International Electron Devices Meeting (IEDM).

Cornell touts "mess-free" graphene growth

12/03/2009 

Researchers at Cornell say they've come up with a way to make graphene devices more simply, by growing the material directly onto a silicon wafer.

Magnetic nanodiscs destroy cancer cells

12/01/2009 

Researchers at Argonne National Laboratory and the University of Chicago have created a new way to target cancer cells with nanotechnology: tiny magnetic discs that deliver a 90% cell destruction rate.

Making E-beam direct write faster

11/19/2009 

E-beam direct write lithography using character projection capability has the potential to enable maskless production for systems-on-chip at leading-edge technology nodes. Advantest and D2S describe their collaborative work that yielded a 4× increase in the number of characters available on EBDW stencil masks, a key factor in achieving the throughput increase needed to make maskless SoCs practical.

Toshiba discloses molecular resist for EUV litho

11/18/2009 

Toshiba Corp. says it has developed a high-resolution photoresist specifically for extreme ultraviolet (EUV) lithography, viable to the 20nm-scale generation.

Samsung: R&D moving to 32/28nm foundry process

11/10/2009 

Samsung Electronics says it has begun focusing its R&D on advanced logic process development for its foundry business, leveraging synergies with its memory development and work with partners and consortia.

Pressure control for reduced microbubble formation

11/10/2009 

Microbubbles in leading-edge photoresist materials can distort the exposure pattern and affect yield, sometimes even if proper steps are taken. Entegris' Jennifer Braggin discusses results of a study in which positive pressure applied on the chemistry before the dispense nozzle reduces microbubbles in top anti-reflective coating (TARC).

COO benefits in manufacturing mobile displays with steppers

11/02/2009 

Frank Bok Namgun and Philippe Cochet from Azores discuss the various cost-of-ownership merits of steppers vs. scanners in photolithography for flat-panel displays, including capital equipment and mask costs.

ITRI adds AMAT tools for 3D IC work

10/16/2009 

Taiwan's Industrial Technology Research Institute (ITRI) will add Applied Materials to its partners for developing 3D chip stacking technology, by placing "a full line" of AMAT processing tools in its labs.

Suss MicroTec banks on ATM in its new 3D probe station

09/28/2009 

Süss MicroTec's Stojan Kanev tells SST/AP about the company's new addition to its toolset for 3D integration: a probe station targeting 300mm wafer-level 3D stacked structures.

SPIE/BACUS: Patterned media is fertile ground for mastering, replication, metrology developments

09/24/2009 

Several papers presented at last week's SPIE/BACUS Symposium described the mastering, replication and metrology challenges of patterned media, writes Toppan Photomasks' Franklin Kalk, reporting exclusively for SST.

SPIE/BACUS: NIL in patterned media...but when for ICs?

09/18/2009 

Reporting exclusively for SST, Toppan Photomasks' Franklin Kalk reviews papers from the SPIE/BACUS Symposium that mapped nanoimprint lithography's intersection with patterned hard-disk media, and discussed how to resolve the key technical issues that have prevented its traction in semiconductor manufacturing.

Carl Zeiss delivers "complete" optics for production EUV

09/17/2009 

Carl Zeiss says it has delivered "a complete optical system for production-ready EUV" in an ASML tool. The entire completed system with projected 60 wafers/hour throughput is expected in 2H10 targeting 20nm node manufacturing.

KLA-Tencor goes for 2xnm trifecta with Teron 600 reticle defect inspection platform

09/15/2009 

September 14, 2009 - KLA-Tencor exec Dan Lopez gives SST a preview of its new Teron 600 Series mask defect inspection system, with programmable scanner-illumination capability and improvements in sensitivity and computational lithography power to address a major transition in mask design at the 2Xnm logic (3Xnm half-pitch memory) node.

NanoInk launches outsourced research program

09/10/2009 

September 9, 2009:  NanoInk is introducing a contract research program to provide miniaturization and multiplex protein analysis.

Ultratech: Melt LSA at sub-16nm, readying move to FinFETs

09/09/2009 

Ultratech execs Art Zafiropoulo and Jeff Hebb update SST on the status of laser-spike anneal (LSA) technology: readiness for 32nm, extendibility to 22nm, and evaluation for 16nm and beyond.




WEBCASTS



Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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