Hopefully everyone is familiar with the International Technology Roadmap for Semiconductors (ITRS). It was launched in 1992, when the Semiconductor Industry Association (SIA) coordinated the first efforts of producing what was originally The National Technology Roadmap for Semiconductors (NTRS). This roadmap of requirements and possible solutions was generated three times in 1992, 1994, and 1997. The NTRS provided a 15-year outlook on the major trends of the semiconductor industry. As such, it was a good reference document for semiconductor manufacturers, suppliers of equipment, materials, and software and provided clear targets for researchers in the outer years.

When the semiconductor industry became increasingly global, the realization that a Roadmap would provide guidance for the whole industry and would benefit from inputs from all regions of the world led to the creation of the International Technology Roadmap for Semiconductors (ITRS).

The invitation to cooperate on the ITRS was extended by the SIA at the World Semiconductor Council in April of 1998 to Europe (represented by the European Electronics Component Manufacturers Association [EECA]), Korea (Korea Semiconductor Industry Association [KSIA]), Japan (formerly the Electronic Industry Association of Japan [EIAJ] and now the Japan Electronics and Information Technology Industries Association [JEITA]), and Taiwan (Taiwan Semiconductor Industry Association [TSIA]).

Much has been written about the ITRS, which is perhaps the best roadmapping effort of all time in any industry. In fact, I stumbled across a dissertation titled “Technological Innovation in the Semiconductor Industry: A Case Study of the International Technology Roadmap for Semiconductors (ITRS)” written by Robert R. Schaller in his pursuit of a degree in philosophy at George Mason University. Robert did a great job analyzing the importance of the roadmap and includes anecdotes such as a short-lived attempt at AMD to create an internal roadmap, and how the ITRS relates to the roadmap to peace in the Middle East.

While the latest updates and revisions of the ITRS usually come out around this time of year, the organizers tell me that it will be in the spring of 2014 for the latest edition (which will be a full revision vs an update, which alternate every year).

A key aspect of the ITRS is that they go out of the way to NOT try to pick “winners and losers” as I’ve heard it called. It is clearly stated that: “The ITRS is devised and intended for technology assessment only and is without regard to any commercial considerations pertaining to individual products or equipment”.

That’s all well and good I suppose, and there is plenty of information that a savvy supplier can pull from the Roadmap about what technology is needed and what the market demand might look like. But it’s time to take it to the next step.

It’s time to think about creating a roadmap for equipment and materials companies, and their suppliers (i.e., suppliers of critical components and subsystems and raw materials). I recently had a conversation on exactly this topic with Gopal Rao, SEMATECH’s senior director of business development. Prior to joining SEMATECH, Rao served as director of Manufacturing Research at Intel, where he led a strategic portfolio of advanced manufacturing projects in partnership with universities and national labs. A 24-year veteran of Intel, Rao progressed through a variety of assignments in senior engineering and management roles.

Gopal attended The ConFab 2013 as a representative of Intel, and said he found the private meeting with suppliers quite useful. What he proposes we do in 2014 was at least introduced the concept of a roadmap for equipment and materials suppliers, perhaps in a panel session, and suggest it be a common thread in the private meetings between sponsors (suppliers) and VIPs (delegates from IC manufacturing companies). We had more than 170 such meetings in 2013. At the end of the conference, we’ll come up with a list of 4 or 5 “action items” for the industry to address. I like this concept a lot, and it’s perfect timing since we’re just now defining session topics and recruiting speakers and panelists.

I like this idea a lot and will plan on adding it to the agenda. If we can define what suppliers need to deliver in terms of throughput, uptime, automation, footprint, uniformity (wafer-to-wafer and tool-to-tool), data reporting and communication protocol, in-situ inspection… and what else?

The ConFab 2014, by the way, will be held June 22-25 at The Encore at The Wynn in Las Vegas. Don’t miss it!

The International Electron Devices Meeting (IEDM) was held in Washington, D.C. this week. I attended a short course on Sunday focused on the Challenges of 10nm and 7nm CMOS Technologies, organized by Aaron Thean of imec. The speakers were Frederic Boeuf of ST Microlelectronics, who gave a general overview of drivers and challenges; Zsolt Tokei of imec, who spoke on interconnect challenges; Andy Wei of GLOBALFOUNDRIES who talked about process integration challenges, Paul Franzon of North Carolina State University who gave an overview of 2.5D and 3D stacked ICs, and Mark Neisser of Sematech of spoke on lithography challenges and EUV readiness for 10nm and beyond.

Monday morning brought three plenary speakers in the form of a talk on graphene integrated circuits by Andrea Ferrari from the University of Cambridge, a fascinating “super chip” concept presented by Mitsumasa Koyanagi from Tohoku University, and a most excellent talk by Geoffrey Yeap of Qualcomm Technologies on how smart mobile SoCs are now driving the semiconductor industry. During lunch, IEDM chairs Ken Rim of Qualcomm and Suman Datta of Penn State highlighted 15 of the top papers, many of them showing recording breaking results

I also attended an interesting evening panel session hosted by Leti that gave an overview of their electronics research efforts, a panel session hosted by Applied Materials on 3D NAND, and a luncheon talk by Eric Enderton of NVDIA research.

I’ll be summarizing what I learned in the coming weeks and months, but it was very clear to me that process technology (including litho) and process integration remains the most critical factor in determining success moving forward. In FinFET production, for example, a gate-last/high-k last process is detrimental to total parasitic capacitance compared to a gate last/high-k first approach. Hopes remain high for EUV – the urgent need for it was clearer than ever – but Andy Wei said it was not going to happen for 10nm (let’s leave it at that he said) and Neisser said the delay has already cause most companies to look earnestly for alternatives. He said DSA was showing great promise, particularly for vias, but it was difficult to assess progress since those involved were not yet publicly discussing results.

“A dream for the device engineer could be a nightmare for a process integration engineer,” said Boeuf in the opening talk. That seemed to be echoed throughout the conference, where the potential of new devices such as tunnel FETs or materials such as graphene were always tempered with a dose of reality that materials had to be deposited, patterned, annealed to create devices, and those devices had to be connected. There was also the perhaps inevitable discussion about how long the industry could continue scaling. We are “running out of numbers,” Wei said in a response to a question regarding what was after 7nm. “We’re running out of atoms,” he added. What was most startling was a comment from Serge Tedesco of Leti who said that ML2 and DSA, as cost effectives and complementary solutions, could extend 193i lithography to the end of the roadmap! The end of the roadmap? I have not given much thought to an end to the roadmap, although the ITRS looks out to 2026. For now, I’ll assume that means the end of conventional scaling, but I have to say I never want to see it end.  

We had our second conference call yesterday with advisory board of The ConFab (a special thanks to Lori Nye of Brewer Science who called in from Japan at 2:00 am her time. Above and Beyond the call of dutry!). The ConFab will be held June 22-25 at The Encore at The Wynn in fabulous Las Vegas, Nevada. It will be the 10^th anniversary of the event and I’m working hard to make it the best one ever.

We’ve recently updated the event website, www.theconfab.com. It includes a short video where, using my best radio voice, we scroll through pictures of last year’s event, including a not so flattering picture of Bill Ross of ISMI (sorry Bill!).

As you know, I travel around a lot, attending various semiconductor meetings and conferences. In fact, I’m off to IEDM tomorrow! Short courses begin at 9:00 am on Sunday and I can’t wait. It’s like drinking the Kool-Aid from a fire hose! But I digress.

The ConFab is vastly different from any other event I’ve attended for several reasons. For one, it’s focused entirely on the economics of semiconductor manufacturing. All of the keynotes and presentations are tuned to that direction. Yes, we get into technology challenges in design, manufacturing, packaging and test, but with a huge helping of why and at what cost? We may kind of sip the Kool-Aid but then talk about how it tastes (okay, any analogy breaks down at some point, but you know what I mean).

Another reason The ConFab is different: We combine thought-provoking conference sessions with private meetings arranged between our sponsors and our VIP attendees or “delegates” as we like to call them. These aren’t “speed dating” kinds of meeting, but 45 minute meetings where both parties come prepared to talk business. I’ve found this is one of the least understood aspect of The ConFab. People often ask me: “Why would leading semiconductor manufacturers feel the need to travel and sit down with their suppliers when they could just pick up the phone and call them whenever they want.” The answer to that is simple. One, it’s true they can do that, but those kinds of conversations are usually focused on some kind of problem. The tool isn’t working; get it fixed. We need this or that. I’m not privy to the private conversations in these meetings at The ConFab, but people have told me they’ve accomplished more in one day than would have in a year otherwise. They’ve also told me it was the first time they met with a customer and didn’t get yelled at.. but that’s a different story. I think it’s also true that most of the technology in a fab come from the tool and equipment suppliers (and software suppliers – let’s not forget EDA!). At The ConFab, they can at least touch base with all of their main suppliers and have useful meetings. People come to this absolutely fabulous hotel, which is easy to get to, relax and listen to luminaries discuss industry trends and challenges, and then sit down with folks that can make business happen. We combine all this seriousness with a variety of networking events, including breakfasts, lunches and evening receptions, as well as refreshment breaks.

At the 2013 ConFab, more than 175 private meetings took place during which sponsors and their customers, both prospective and existing, engaged in strategic discussions and created crucial alliances for the future. These pre-scheduled boardroom meetings offer an efficient and highly effective approach to conducting face-to-face business in a global industry

I was talking to Bill Tobey yesterday after our conference call. Bill, who is a true industry veteran, has been involved with The ConFab from the very beginning and has seen many things come and go. He reminded me that in the mid 2014 we will know a lot more than we do today. EUV alone – whether it works or not — is going to be a major factor in determining the “economic balance” as Bill put it. He said we should keep that in mind as we develop our session topics and invite our speakers. Sage advice if I’ve ever heard it. Bill was one of the co-founders of Micronix, which was focused on providing a single point X-ray solution. That didn’t take off because of problems with the X-rays masks. Guess what – the same problem still exists with EUV masks. But I digress yet again.

With Bill’s help – and the rest of our fantastic board members — we’re putting together the agenda for 2014. I’m more than confident that it will be as exciting as past years, when we had such speakers as: Y.W. Lee of Samsung, Subu Iyer of IBM, John Chen of Nvidia, Bob Bruck and Jackie Sturm of Intel, BJ Woo of TSMC, Ali Sebt of Renesas and many others (check out our most excellent lineup from this year).

We will be covering the economic outlook for 2014 and beyond, major technology challenges facing the industry – such as the move to 450mm wafers – and of course the big issues such as the escalating costs of R&D.

More on this later, but we are also planning a second ConFab event, The ConFab II, in November. This will focus on critical subsystems and components: all the things that go into today’s extremely complex processing and assembly tools, including robotics, vacuum pumps, pressure gauges, power supplies, exhaust treatment, wafer aligners, etc.

This is all a long-winded way of saying I hope you join us next June at The ConFab for our 10^th anniversary, and The ConFab II in November. Check out our website for more: www.theconfab.com.

Pete

P.S. If you’re interested in a sponsorship, contact Sabrina Straub at [email protected].