I’m very pleased to announce that IBM’s Dr. Gary Patton will provide the keynote talk at The ConFab on Tuesday, June 24^th. Gary is Vice President of IBM’s Semiconductor Research and Development Center in East Fishkill, New York. He has responsibility for IBM’s semiconductor R&D roadmap, operations, and technology development alliances, with primary locations in East Fishkill, New York, Burlington, Vermont, and the Albany Nanotech Research Center in Albany, New York. During his career at IBM, Dr. Patton has held various management and executive positions in IBM’s Microelectronics, Storage Technology, and Research Divisions, including positions in technology and product development, manufacturing, and business line management. Dr. Patton received his B.S. degree in electrical engineering from UCLA and his M.S. and Ph.D. degrees in electrical engineering from Stanford University. He is also a Fellow of the IEEE.

After Gary’s keynote, we’ll have a panel session focused on R&D collaboration. Moderated by Scott Jones of Alix Partners, the panel will include Rory McInerney, VP of the platform engineering group at Intel; Chris Danely, the Managing Director and global coordinator for J.P. Morgan’s semiconductor research team; and Mike Noonen, co-founder of Silicon Catalyst, the industry’s first semiconductor startup “incubator”.

It promises to be a very interesting morning! The ConFab will be held June 22-25 at The Encore at The Wynn in Las Vegas.

In the late ‘80s and ‘90s, when our magazine staff gathered for dinner we often made a toast: “Here’s to chip silicon!” I really believed (and still do) that making electronics more affordable would increase their use and make our lives better and the world a better place to be.

I haven’t toasted to cheap silicon for a while. Why? Because that mission has been accomplished.

At SEMI’s ISS, Paul Farrar, manager of the G450C consortium put the industry progress over the last 40+ years in perspective. “1 Megabyte of memory in 1970 was $750,000. It was sold as an IBM add-on,” he said. “The great technology was made of 57mm wafers, five masking levels, and one level of metal. Today, it’s is less than a penny. That is a 100 million X improvement.”  

Of course, most people would like to see this trend continue, but it’s highly unlikely that we’ll see such dramatic progress. Scaling is getting too expensive. The transition to 450mm looks feasible from a technical standpoint (see my column on pg. 10) but it’s not yet clear if it will be less expensive than 300mm, particularly when you factor in 450mm lithography. 

So if the scaling mission is accomplished, what’s next? There’s exploding interest in the “Internet of Things” where almost everything is tagged and connected. That will require some big upgrades in the server/network infrastructure, but that can be done with existing technology. It will also require inexpensive sensors and wireless communication. By some estimates, the technology to achieve that is not ready. We need about a 10X improvement in price/performance. Ditto for wearable electronics and a whole host of applications in medical, automotive and the smart grid.

In the future, perhaps electronics will be printed like potato chip bags on roll-to-roll machines with ink-jet-like deposition of materials. Perhaps tiny MEMS with integrated sensors, thin-film batteries, energy harvesting, microprocessors and other functions will be produced for less than a penny. Perhaps everyone will have inexpensive body area networks embedded in their clothing that constantly monitor their health.

It’s all possible, but it will take some innovation in processing equipment and materials.