Semiconductors

SEMICONDUCTORS ARTICLES



Samsung: R&D moving to 32/28nm foundry process

11/10/2009 

Samsung Electronics says it has begun focusing its R&D on advanced logic process development for its foundry business, leveraging synergies with its memory development and work with partners and consortia.

Pressure control for reduced microbubble formation

11/10/2009 

Microbubbles in leading-edge photoresist materials can distort the exposure pattern and affect yield, sometimes even if proper steps are taken. Entegris' Jennifer Braggin discusses results of a study in which positive pressure applied on the chemistry before the dispense nozzle reduces microbubbles in top anti-reflective coating (TARC).

Analyst: Four chipmakers on pace for 2009 growth

11/10/2009 

The suffocating downturn will make 2009 overall one of the toughest in the industry's history, but four firms are still in position to increase sales from a year ago, based on year-to-date tallies compiled by IC Insights.

Hitachi unit improves microhole-drilling processes for PCBs

11/05/2009 

Hitachi Via Mechanics says it has developed new processes for microhole drilling cast polyimide wafers and multilayered materials used in high density electronics packaging, that can produce ≤100μm-dia. holes in high-volume manufacturing.

Micron sampling new NAND+DRAM multichip package

11/04/2009 

Micron Technology says it is now sampling a multichip package combing its 34nm-based 4Gb SLC NAND flash and 50nm-based 2Gb low-power DDR DRAM memories, a combination it says offers better cost and power savings for mobile devices.

Alchimer: Higher-AR TSV saves $700/wafer

11/04/2009 

A new study suggests that through-silicon vias (TSV) with higher aspect ratios (20:1 or 10:1, vs. 5:1) offer a significant payback by saving space on a die, up to $700 per wafer.

Mentor tips plans for unified Si test, yield analysis

11/03/2009 

Mentor Graphics is launching what it calls a comprehensive test and yield analysis platform incorporating homegrown and acquired technologies, to help customers drill down through failure analysis data to better identify defects and fix them, thus saving time and improving yields.

Targeting 22nm and beyond copper electroplating

11/02/2009 

Novellus VP/GM Sesha Varadarajan explains how the company's new Sabre Excel tool uses "state-of-the-art" millisecond control, dynamic current modulation, a low-corrosion electrolyte, and redesigned wafer handling to provide fill and defect density performance for the 22nm technology node.

COO benefits in manufacturing mobile displays with steppers

11/02/2009 

Frank Bok Namgun and Philippe Cochet from Azores discuss the various cost-of-ownership merits of steppers vs. scanners in photolithography for flat-panel displays, including capital equipment and mask costs.

Intel, Numonyx tip multilayer PCM arrays

10/29/2009 

Intel and Numonyx say they have built a "vertically integrated" 64Mb test chip enabling stacking of multiple layers of phase-change memory (PCM) arrays within a single die, paving the way for devices that can scale well beyond conventional memory with more capacity, lower power consumption, and taking up less space.

Electroglas reforms around prober assets

10/27/2009 

A Delaware bankruptcy court has approved the sale of Electroglas' wafer probe assets, including name and trademarks, to private financial group EG Systems -- formed specifically for this purpose.

Report: Spansion to sell 300mm Aizu-Wakamatsu fab

10/27/2009 

Spansion Japan plans to sell its 300mm/65nm  fab in Aizu-Wakamatsu as part of its bankruptcy reorganization plan, according to the Nikkei daily.

Avoiding ASIC expense and risk with SiCB technology

10/26/2009 

Embedded computing modules employing "silicon circuit board" technology as an alternative to expensive ASIC developments offer advantages in performance and power for integrating memory and logic -- and are a practical alternative to 3D integration due to thermal and supply chain issues, explains siXis' David Blaker.

New transistor noise model helps ID defects in gate stacks

10/26/2009 

Researchers from SEMATECH have come up with a better model to help pinpoint defect characteristics from low-frequency noise data in advanced gate stack transistors, seen as a key step in defect analysis and elimination needed for device scaling.

SMIC quals Microstaq MEMS chip for fluid control

10/26/2009 

Microstaq, a developer of silicon MEMS-based fluid control technology, has qualified its Ventilum MEMS-based chip at Semiconductor Manufacturing International Corp (SMIC), billed as both an advancement in electronic valve technology and a new facet to the Chinese foundry's MEMS capabilities.

DARPA project demos wafer-scale graphene-on-Si FETs

10/23/2009 

A DARPA-backed program to develop graphene-based RF circuits with "game-changing" potential for electronics systems has achieved a new milestone: development of graphene-on-silicon FETs at full wafer scale.

Study compares SOI vs. bulk for finFETs

10/23/2009 

Cost and performance between silicon-on-insulator (SOI) and bulk finFETs are "for all practical purposes equivalent," but finFETs are more challenging to manufacture due to increased process variability, according to results from a study from the SOI Industry Consortium.

Researchers create, manipulate new multiferroic materials

10/23/2009 

Researchers from the US have created a new multiferroic material, and another group from the US and the Netherlands say they can control such multiferroic properties -- achievements that have implications in future electronics and particularly memory devices.

Leti touts planar SOI for LP 22nm

10/21/2009 

French R&D organization Leti says its work with SOI-based planar CMOS meets requirements for low-power (LP) 22nm node device requirements, e.g. consumer electronic devices such as 4G mobile phones.

IMEC: 3D challenges, integrating DRAM on logic

10/20/2009 

Bart Swinnen, IMEC's director of interconnect and process technology unit, discusses with SST/AP the research center's 3D program, from its annual press event in Leuven, Belgium.




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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