Tag Archives: Intel

Ruthenium Nanolayers are Ferromagnetic at RT

Researchers from Intel Corporation and the University of Minnesota and the University of Wisconsin have shown that strained atom-scale films of pure ruthenium (Ru) metal exhibit ferromagnetism at room temperature, openning up the possibility of using the material to build novel magnetic random access memory (MRAM) devices. As per details recently published in Nature Communications (https://doi.org/10.1038/s41467-018-04512-1), Ru thin films with a thickness of 2.5, 6, or 12 nm, were grown on Al2O3 substrates cut along the (110) direction, that had been covered with a 20 nm Mo seed layer. The thin films were grown using a eight-target UHV sputtering system with base pressure of 8 × 10−8 Torr or lower, resulting in the controlled epitaxial growth of strained body-centered tetragonal phase Ru.

From first principles of materials engineering, there should be ways to use different templating materials for this graphoepitaxial process such that silicon-oxide could be used as the substrate instead of aluminum-oxide. If so, then this process could be run on 300mm silicon wafers in today’s leading commercial IC fabs.

The (001) tetragonal Ru plane does not lie perpendicular to the substrates which leads to a soft coercive field, however, if out-of-plane texturing can be achieved high coercivity Ru may be realized. The thickness dependence was also examined, and it was found that due to Ru relaxing into a non-ferromagnetic phase, the magnetization drops with increasing thickness. The 12 nm thick sample showed magnetization of about one-half that of the two thinner samples.

Original Article: https://www.nature.com/articles/s41467-018-04512-1

—E.K.

PCM + ReRAM = OUM as XPoint

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The good people at TECHINSIGHTS have reverse-engineered an Intel “Optane” SSD to cross-section the XPoint cells within (http://www.eetimes.com/author.asp?section_id=36&doc_id=1331865&), so we have confirmation that the devices use chalcogenide glasses for both the switching layer and the selector diode. That the latter is labeled “OTS” (for Ovonic Threshold Switch) explains the confusion over the last year as to whether this device is a Phase-Change Memory (PCM) or Resistive Random Access Memory (ReRAM)…it seems to be the special variant of ReRAM using PCM material that has been branded Ovonic Unified Memory or “OUM” (https://www.researchgate.net/publication/260107322_Programming_Speed_in_Ovonic_Unified_Memory).

As a reminder, cross-bar ReRAM devices function by voltage-driven pulses creating resistance changes in some material. The cross-bars allow for reading and writing all the bits in a word-string in a manner similar to Flash arrays.

In complete contrast, Phase Change Memory (PCM) cells—as per the name—rely upon the change between crystalline and amorphous material phases to alter resistance. The standard way to change phases is with thermal energy from an integrated set of heater elements. The standard PCM architecture also requires one transistor for each memory cell in a manner similar to DRAM arrays.

Then we have the OUM variant of PCM as previously branded by Energy Conversion Devices (ECD) and affiliated shell-campanies founded by tap-dancer-extraordinaire Stanford Ovshinsky (https://en.wikipedia.org/wiki/Stanford_R._Ovshinsky). So-called “Ovonic” PCM cells see phase-changes driven by voltage pulses without separate heater elements, such that from a circuit architecture perspective they are cross-bar ReRAMs.

Ovshinsky et al. successfully sold this technology to industry many times. In 2000, it was licensed to STMicroelectronics. Also in 2000, it was used to launch Ovonyx with Intel investment (http://www.eetimes.com/document.asp?doc_id=1176621), at which time Intel said the technology would take a long time to commercialize. In 2005 Intel re-invested (http://www.businesswire.com/news/home/20051019005145/en/Ovonyx-Receives-Additional-Investment-Intel-Capital). Finally in 2009, Intel and Numonyx showed a functional 64Mb XPoint test chip at IEDM (http://www.eetimes.com/document.asp?doc_id=1176621).

In 2007, Ovonxyx licensed it to Hynix (http://www.eetimes.com/document.asp?doc_id=1167173), and Qimonda (https://www.design-reuse.com/news/15022/ovonyx-qimonda-sign-technology-licensing-agreement-phase-change-memory.html), and others. All of those license obligations were absorbed by Micron when acquiring Ovonyx (https://seekingalpha.com/article/3774746-micron-tainted-love). ECD is still in bankruptcy (http://www.kccllc.net/ecd/document/list/3153).

So, years of R&D and JVs are behind the XPoint Optane(TM) SSDs. They are cross-bar architecture ReRAM arrays of PCM materials, and had the term not been ruined by 17-years of over-promising and under-delivering they would likely have been called OUM chips. Many others tried and failed, but Intel/Micron finally figured out how to make commercial gigabit-scale cross-bar NVMs using OUM arrays. Now they just have to yield the profits…

—E.K.

Moore’s Law Smells Funny

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…maybe we need “Integrated Cleverness Law”

“Jazz is not dead, it just smells funny.” – Frank Zappa 1973
from Be-Bop Tango (Of The Old Jazzmen’s Church)

Marketing is about managing expectations. IC marketing must position next-generation chips as adding significant new/improved functionalities, and for over 50 years the IC fab industry has leaned on the conceptual crutch of “so-called Moore’s Law” (as Gordon Moore always refers to it) to do so. For 40 years the raw device count was a good proxy for a better IC, but since the end of Dennard Scaling the raw transistor count on a chip is no longer the primary determinant of value.

Intel’s has recently released official positions on Moore’s Law, and the main position is certainly correct: “Advances in Semi Manufacturing Continue to Make Products Better and More Affordable,” as per the sub-headline of the blog post by Stacy Smith, executive vice president leading manufacturing, operations, and sales for Intel. Smith adds that “We have seen that it won’t end from lack of benefits, and that progress won’t be choked off by economics.” This is what has been meant by “Moore’s Law” all along.

When I interviewed Gordon Moore about all of this 20 years ago (“The Return of Cleverness” Solid State Technology, July 1997, 359), he wisely reminded us that before the industry reaches the limits of physical scaling we will be working with billions of transistors in a square centimeter of silicon. There are no ends to the possibilities of cleverly combining billions of transistors with sensors and communications technologies to add more value to our world. Intel’s recent spend of US$15B to acquire MobileEye is based on a plan to cost-effective integrate novel functionalities, not to merely make the most dense IC.

EETimes reports that at the International Symposium on Physical Design (ISPD 2017) Intel described more than a dozen technologies it is developing with universities and the SRC to transcend the limitations of CMOS. Ian Young, a senior fellow with Intel’s Technology Manufacturing Group and director of exploratory integrated circuits in components research, recently became the editor-in-chief of a new technical journal called the IEEE Journal of Exploratory Solid-State Computational Devices and Circuits, which explores these new CMOS-fab compatible processes.

Meanwhile, Intel’s Mark Bohr does an admirable job of advocating for reason when discussing the size of minimally scaled ICs. Bohr is completely correct in touting Intel’s hard-won lead in making devices smaller, and the company’s fab prowess remains unparalleled.

As I posted here three years ago in my “Moore’s Law Is Dead” blog series, our industry would be better served by retiring the now-obsolete simplification that more = better. As Moore himself says, cleverness in design and manufacturing will always allow us to make more valuable ICs. Maybe it is time to retire “Moore’s Law” and begin leveraging a term like “Integrated Cleverness Law” when telling the world that the next generation of ICs will be better.

—E.K.

China to be 15% of World Fab Capacity by 2018

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Currently there are eight Chinese 300mm-diameter silicon IC fabs in operation as 2016 comes to a close. Chinese IC fab capacity now accounts for approximately 7% of worldwide 300mm capacity, as reported by VLSIresearch in a recent edition of its Critical Subsystems report (https://www.vlsiresearch.com/public/csubs/). This will expand rapidly, as ten are now under construction and two more have been announced. China’s 300mm fabs are located in ten cities.

“Total Chinese capacity is expected to be around 13 million by end 2018,” said John West of VLSI Research. Worldwide 300mm wafer fabrication capacity will exceed 85 million wafers per year in 2018, putting China in control of 15% of worldwide 300mm capacity in 2018. While new Chinese fabs have yet to prove they can produce leading edge silicon ICs with high yields, it should be only a matter of time before they prove they stand among the world’s great semiconductor production regions.

West recently presented a China market outlook for semiconductors, original equipment manufacturers (OEM), and critical subsystems at the recent Critical Materials Council (CMC) Seminar (http:cmcfabs.org/seminars) held in Shanghai. At the same event, representatives from Intel and TI discussed supply-chain dynamics in China, and Secretary General Ingrid Shi of the Integrated Circuit Materials Industry Technology Innovative Alliance (ICMITIA) presented on “The China Materials Supply Consortium and China’s 5 Year Technology Plan.”

The 2016 CMC Seminar also saw a presentation of China’s first semiconductor-grade 300mm silicon wafer supplier: the recently unveiled Zing Semiconductor (www.zingsemi.com). Founder and CEO Richard Chang, co-founder of SMIC, has assembled a team and funding to start creating wafers in the Pudong region of Shanghai. He showed a photo of his company’s first 300mm silicon boule at the event.

[DISCLOSURE: Ed Korczynski is also Marketing Director for TECHCET CA, an advisor firm that administers the Critical Materials Council and CMC events.]

—E.K.

Andy Grove blessed us all

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Andy Grove, the man who codified the commercial IC industry dynamic as “Only the Paranoid Survive” died yesterday at the age of 79. His instinctive paranoia derived from his tragic experiences while growing up in Hungary, as referenced by Wikipedia in the prolog to “Swimming Across: a Memoir”:

By the time I was twenty, I had lived through a Hungarian Fascist dictatorship, German military occupation, the Nazis’ “Final Solution,” the siege of Budapest by the Soviet Red Army, a period of chaotic democracy in the years immediately after the war, a variety of repressive Communist regimes, and a popular uprising that was put down at gunpoint. . . [where] many young people were killed; countless others were interned. Some two hundred thousand Hungarians escaped to the West. I was one of them.

Grove was responsible for guiding Intel in the 1980s through the amazingly risky yet ultimately wildly successful strategy of abandoning memory chip production as part of a diversified product portfolio to “bet the company” on microprocessors. In the September 1997 issue of Solid State Technology, I wrote an article titled “DRAM fab strategies in Asia” that summarizes why and how US companies like Intel strategically abandoned DRAM production:

In the 1960s, US companies created the IC manufacturing industry and enjoyed virtually unchallenged world dominance through the 1970s. Japanese IC companies, though at first the junior companies in low-margin and foundry partnerships, rose to challenge the more senior US companies in the 1980s. By the latter half of the 1980s, Japan effectively owned the DRAM business and Japan`s outstanding success in IC production can be directly traced to early US manufacturing partnerships. One strategy played out by US companies with portfolios of memory chip designs was outsourcing of DRAM production to Korean companies. In so doing, US companies committed their futures to non-DRAM products such as microprocessors, DSPs, and ASICs.

Few executives have sufficient vision while leading a work-force with sufficient discipline to be able to re-invent a company in such a way. The capital equipment investments needed to create a leading-edge IC fab have always been daunting, and as Intel employee #3 who had led engineering Grove was able to see a way to leverage strategic R&D to ensure that leading-edge IC product functionalities would pull in sufficient demand to keep the fabs full. Not only did the fabs stay full, but the x86 microprocessor profit margins allowed Intel to grow to annual sales of $25 billion by the time he was replaced as CEO by Craig Barrett in 1998.

The San Jose Mercury News and EETimes have published wonderful additional remembrances of his life. Andy Grove blessed our industry by being a living example of engineering excellence and legit leadership.

—E.K.

3D XPoint uses PCM Material in ReRAM Device

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IM Flash pre-announced “3D XPoint”(TM) memory for release later this year, and lack of details has led to widespread confusion regarding what it is. EETimes has reported that, “Chalcogenide material and an Ovonyx switch are magic parts of this technology with the original work starting back in the 1960’s,” said Guy Blalock, co-CEO of IM Flash at the 2016 Industry Strategy Symposium hosted by the SEMI trade group. However, contradicting industry terminology conventions, in another article EETimes reported that a spokesperson for Intel has said that, “3D XPoint should not be described as ReRAM.”
First promoted by the master of materials solutions-looking-for-problems Sanford Ovshinsky under the name “Ovonic” trademark, chalcogenide materials form glassy structures with meta-stable properties. With proper application of heat and electrical current, chalcogenides can be made to switch between low-resistivity crystalline and high-resistivity amorphous phases to create Phase-Change Memory (PCM) arrays in silicon circuit architectures. Chalcogenides can also function as the matrix for the diffusion of silver ions in a cross-point device architecture to create a digital “Resistive RAM” (or “ReRAM” or “RRAM”), or create an analog memristor for neuromorphic applications as explored by Prof. Kris Campbell of Boise State in collaboration with Knowm.

Hitachi and Renesas Technology developed Phase-Change Memory (PCM) cell technology employing Ta2O5 interfacial layer to enable low-power operation. (Source: Hitachi)

The Figure shows a schematic cross-section of a typical PCM cell. From a scientific perspective, we could say that any memory cell that relies upon a change in material phase to encode digital data should be termed a PCM. However, due to the history of this specific type of PCM device being the only architecture explored for decades (and commercialized for limited niche sub-markets), and due to the fundamentally different circuit architectures, it is reasonable to categorically deny that any cross-point device is a “PCM.”
However, any cross-point memory device based on a resistance change has to be a ReRAM regardless of the switching phenomenon: phase-change, filament-growth, ion-diffusion, etc. So we could say that this new chip uses PCM material in a ReRAM device.
—E.K.

Cross-point ReRAM Integration Claimed by Intel/Micron

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The Intel/Micron joint-venture now claims to have successfully integrated a Resistive-RAM (ReRAM) made with an unannounced material in a cross-point architecture, switching using an undisclosed mechanism. Pilot production wafers are supposed to be moving through the Lehi fab, and samples to customers are promised by end of this year.
HP Labs announced great results in 2010 on prototype ReRAM using titania without the need for a forming step, and then licensed the technology to Hynix with plans to bring a cross-point ReRAM to market by 2013. SanDisk/Toshiba have been working on ReRAM as an eventual replacement for NAND Flash for many years, with though a bi-layer 32Gb cross-point ReRAM was shown at ISSCC in 2013 they have so far not announced production.
Let us hope that the folks in Lehi have succeeded where HP/Hynix and SanDisk/Toshiba among others have so far failed in bringing a cross-point ReRAM to market…so this may be a “breakthrough” but it’s by no means “revolutionary.” Until the Intel/Micron legal teams decide that they can disclose what material is changing resistance and by what mechanism (including whether an electrical “forming” step is needed), the best we can do is speculate as to even how much of a breakthrough this represents.
—E.K.