Tag Archives: fab

Trefonas Earns 2016 Perkin Medal

The Society of Chemical Industry (SCI), America Group, announced on May 5, 2016 that Peter Trefonas, Ph.D., corporate fellow in Electronic Materials at Dow Chemical Co (NYSE:DOW), has won the 2016 SCI Perkin Medal. This honor recognizes Trefonas’ contributions in the development of chemicals that enable microlithography for the fabrication of microelectronic circuits. Trefonas will receive the medal at a dinner in his honor on Tuesday, September 13, 2016, at the Hilton Penn’s Landing Hotel in Philadelphia.

Trefonas made major contributions to the development of many successful products which are used in the production of integrated circuits spanning device design generations from 2 microns to 14 nanometers. These include photoresists, antireflectant coatings, underlayers, developers, and ancillary products. At the most recent SPIE Advanced Lithography conference he was part of a team that presented on the use of a resolution extension material, “Chemical trimming overcoat: an enhancing composition and process for 193nm lithography.”

He is an inventor on 61 US patents, has over 25 additional published active U.S. patent applications, is an author of 99 journal and technical publications, and is a recent recipient of both the 2014 ACS Heroes of Chemistry Award and the 2014 SPIE Willson Award. His research career began at Monsanto, and moved via acquisitions by Shipley, Rohm&Haas, and Dow.

—E.K.

Omhi kept us Ultra-Clean

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Sadly, I just recently learned from the UCPSS 2016 website that Ohmi-sensei—Professor Doctor Tadahiro Ohmi—passed away in Sendai on 21 February 2016. As the guru of ultra-clean technology, he established the global Ultra Clean Society in 1988, founded the International Symposium of Semiconductor Manufacturing (ISSM) in 1992, served as program committee member of the UCPSS between 1992 and 2006, and was an IEEE Fellow. Ohmi was a Professor of New Industry Creation Hatchery Center at Tohoku University, after serving as a Professor at the Electronic Engineering Department, School of Engineering at Tohoku U.

Ohmi was most famous for asserting that IC manufacturing yield could be 100% if only every tool and tube in the fab were built with ultra-clean surfaces, and if all direct-materials and fluids flowing in the fab were ultra-clean. In the 1980s when IC designs and fab processes were relatively simple and HVM yields were in the 30-60% range, huge improvements came from removing “random” particles from dirty surfaces. Soon enough by the mid-1990s “clean enough” was found to be the pragmatic response to the experience of diminishing returns after yields were in the 90% range. Most famously for posterity, in 1993 Ohmi edited “Ultraclean Technology Handbook: Ultrapure Water, Vol.1”.

I first met him when UltraClean Technology, Inc. (UCTT) was founded in California in 1996 to weld ultra-clean steel from parent company Mitsubishi in a Class-1 cleanroom, and he was the genius bringing his vision of a better world to the rest of us. However, eventually UCTT separated from Mitsubishi and added Class-100 and Class-1000 assembly areas to provide “clean enough” technology…heresy to the Guru of ultra-clean; I never met him again when I worked for the company as a product manager in 2004.

As covered by EETimes in 2002, Ohmi could clearly see that something new was going to be needed in fab technology, but his vision for a way forward was an unrealizable dream:

Ohmi said his comprehensive process, from design through chip making, would create devices with 10 times better performance than today’s chips. At the same time, he said, it would squeeze design and production time to 1/40, clean room space to 1/5 and production cost to 1/10 of what’s now required.

Throughout his career he continued to look for breakthroughs to enable new generations of semiconductor manufacturing technology, recently supervising a project to develop a “next-generation flat panel display.”

An extraordinarily prolific inventor, his name is on an astonishing 592 issued US patents, based on 795 US applications filed, the most recent on December 21st of last year.

—E.K.

Andy Grove blessed us all

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Andy Grove, the man who codified the commercial IC industry dynamic as “Only the Paranoid Survive” died yesterday at the age of 79. His instinctive paranoia derived from his tragic experiences while growing up in Hungary, as referenced by Wikipedia in the prolog to “Swimming Across: a Memoir”:

By the time I was twenty, I had lived through a Hungarian Fascist dictatorship, German military occupation, the Nazis’ “Final Solution,” the siege of Budapest by the Soviet Red Army, a period of chaotic democracy in the years immediately after the war, a variety of repressive Communist regimes, and a popular uprising that was put down at gunpoint. . . [where] many young people were killed; countless others were interned. Some two hundred thousand Hungarians escaped to the West. I was one of them.

Grove was responsible for guiding Intel in the 1980s through the amazingly risky yet ultimately wildly successful strategy of abandoning memory chip production as part of a diversified product portfolio to “bet the company” on microprocessors. In the September 1997 issue of Solid State Technology, I wrote an article titled “DRAM fab strategies in Asia” that summarizes why and how US companies like Intel strategically abandoned DRAM production:

In the 1960s, US companies created the IC manufacturing industry and enjoyed virtually unchallenged world dominance through the 1970s. Japanese IC companies, though at first the junior companies in low-margin and foundry partnerships, rose to challenge the more senior US companies in the 1980s. By the latter half of the 1980s, Japan effectively owned the DRAM business and Japan`s outstanding success in IC production can be directly traced to early US manufacturing partnerships. One strategy played out by US companies with portfolios of memory chip designs was outsourcing of DRAM production to Korean companies. In so doing, US companies committed their futures to non-DRAM products such as microprocessors, DSPs, and ASICs.

Few executives have sufficient vision while leading a work-force with sufficient discipline to be able to re-invent a company in such a way. The capital equipment investments needed to create a leading-edge IC fab have always been daunting, and as Intel employee #3 who had led engineering Grove was able to see a way to leverage strategic R&D to ensure that leading-edge IC product functionalities would pull in sufficient demand to keep the fabs full. Not only did the fabs stay full, but the x86 microprocessor profit margins allowed Intel to grow to annual sales of $25 billion by the time he was replaced as CEO by Craig Barrett in 1998.

The San Jose Mercury News and EETimes have published wonderful additional remembrances of his life. Andy Grove blessed our industry by being a living example of engineering excellence and legit leadership.

—E.K.

Apple Fab Speculation

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Apple Corp. recent purchased an old 200mm-diameter silicon wafer fab in San Jose capable of creating as small as 90nm device features. Formerly owned and operated by Maxim, the US$18.2M purchase reportedly includes nearly 200 working fab tools. Some people outside the industry have speculated that Apple might use this fab to do R&D on the A10 or other advanced logic chips, but this old tool-set is completely incapable of working on <45nm device features so it’s useless for logic R&D.

As reported at EETimes, this old fab could be used for the R&D of “mixed-signal devices, MEMS and image sensors and for work on packaging.” Those who know do not speak, while those who speak do not know…I do not know so I’m free to join the public speculation. Mixed-signal and MEMS processing would require major re-tooling of the line, but this 15-20 year-old tool-set is nearly turn-key for wafer-level packaging (WLP). With minimal re-tooling, this line could produce through-silicon vias (TSV) or through-mold vias (TMV) as part of Fan-Out WLP (FO-WLP).

Our friends at ChipWorks have published a detailed tear-down analysis of the System-in-Package (SiP) used in the first generation Apple Watch; it contains 30 ICs and many discretes connected by a 4-layer printed circuit board (PCB). Significant power and performance improvements in mobile devices derive from stacking chips in such dense packages, and even greater improvements can found in replacing the PCB with a silicon interposer. With Apple pushing the limits on integrating new functionalities into all manner of mobile devices, it would be strategic to invest in WLP R&D in support of application-specific SiP design.

—E.K.

EUV Cost at 1000 Daily Exposures

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On October 14, 2015, ASML Holding N.V. (ASML) published its 2015 third-quarter results: Q3 net sales of €1.55 billion with gross margin of 45.4% (in line with guidance), and guided Q4 2015 net sales at approximately €1.4 billion and a gross margin of around 45%. Due to mismatched financial analyst expectations, Bloomberg reported that ASML’s stock price dropped ~7% in a single day of trading, despite the company also reporting upgrades to both the TWINSCAN NXT 193nm-immersion (193i) and the NXE Extreme Ultraviolet (EUV) tools. In particular, a new record of 1000 wafer exposures in a single day was set by one EUV tool.

The science of controlling the 13.54nm wavelength electromagnetic radiation that we like to call “Extreme Ultra-Violet” or “EUV” (instead of the colloquial scientific term “soft x-ray”) is inherently challenging. The engineering of EUV Lithography is not just challenging but bordering on inherently impossible: from exploding tin plasma source, to all-reflective lenses that absorb energy, to the trade-offs in mask pattern protection. The team at ASML working on the exposure tool—along with the different specialist organizations still working on improved sources, masks, and resists—deserve the industry’s unwavering admiration for the important work they do every day.

In a prepared statement, ASML President and Chief Executive Officer Peter Wennink said, “We have proven the capability both to expose 1,000 wafers per day and, in a manufacturing readiness test, to expose 15,000 wafers in four weeks. We have also achieved a four-week average availability of more than 70 percent at multiple customer sites. The first shipment of our fourth-generation EUV lithography system, the NXE 3350B, is in progress, with two more expected to ship in Q4.”

Still, progress along desired EUV roadmaps continues to be slow, and the competitive target shifts when the 193i exposure tool gains a 10% throughput improvement to 275 wafer-passes/hour (wph). When the 193i tool gains a 30% overlay improvement, that means double-patterning based on litho-etch-litho-etch (LELE) process flows gain in pattern fidelity. Since ASML provides both technologies, delays in orders for EUV just means more sales of 193i tools.

Let’s play with the numbers here…275 wph x 20 hours x 30 days = 165k wafer-passes/month for the NXT:1980. The NXE:3350B can current handle 15k wafer-passes/month. So even if the tools were equally priced, just based on tool depreciation each EUV exposure today costs >10x that of a 193i exposure, which is why pitch-splitting multi-patterning 193i continues to dominate.

—E.K.

Silex’ Strategic Acquisition by China

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A secretive investment holding company out of Hong Kong named GAE Ltd has acquired 98% of the shares in Silex Microsystems AB (Jarfalla, Sweden). The transaction took place on July 13th of this year when the former major shareholders agreed to sell all of their respective holdings, while Silex founder and CEO Edvard Kalvesten retains 2% of the shares in the company and continues his role as CEO and board member of Silex. No changes are made to the organizational structure or business operations of Silex, while the new owners plan to build a new high-volume manufacturing line near Beijing that clones the equipment and processes in Sweden with first wafers out by mid-2017 (as reported at EETimes).

Silex claims to be the “world’s number one Pure Play MEMS Foundry”, has worked with AMFitzgerald&Assoc. on RocketMEMS shuttle wafers to reduce MEMS development time by 6-12 months, and has developed multiple Through-Silicon Via (TSV) technologies to allow for efficient 3D integration of MEMS and CMOS.

Almost lost as a footnote in the news is that Silex holds IP on lead-zirconium-titanate (PZT) thin-film technology that allows for efficient piezo-electric energy-harvesting chips. MicroGen Systems is currently in the market with aluminum-nitride (AlN) piezo-cantilever micro-power generator system to power IoT nodes by scavenging either single-frequency or multi-frequency vibrations, working with X-Fab in Germany as foundry partner. If PZT-based piezo-cantilever energy harvesters can compete with AlN-based devices then the former could constitute much of the product volume in the new Silex Beijing fab. In 2014, Yole Developpement forecast “the integration of IoT-dedicated electronic components to result in a market volume of 2B units for these devices by 2021;” if 30% will use energy harvesting then this represents 600M units globally.

—E.K.

300mm ams Fab Bet on IoT

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Leading-edge IC fab investments are multi-billion-dollar risky bets. Insufficient demand for ICs dooms the line to economic failure regardless of the quality of design and manufacturing. Thus, it is a big deal that Austrian-headquartered ams AG—world leader in production of IC sensors, RFID chips, and power-supplies—has announced plans to set up a new silicon wafer manufacturing line in up-state New York.
To date, ams’ leading fabs run 200mm diameter silicon wafers, while the new line that is planned for 2017 will run both 200mm and 300mm diameter. With ~2.4x more chips/wafer, the commitment to a 300mm line is a sign that ams expects a major increase in demand for certain products. The vision for the Internet of Things (IoT) is that ubiquitous “smart objects” will be able to connect and exchange useful information without human direction, and the foundation of smart is sensing combined with decision-making. While other companies provide logic chips to allow for decision making, ams provides chips that can sense the world in various ways.
The investment into Marcy, New York represents a bet that there will be sustained demand for analog and sensor chips to provide much of the “smarts” for the IoT. Thus ams is planning to spend >US$2 billion over the next 20 years on capital purchases, operating expenses, and other investments in the facility. Pete Singer provides all the details in his thorough report.
—E.K.