I received this news from Dan Corliss of IBM today and it is reproduced below. Dan is the EUV Development Program Manager for IBM. As the previous goal for ASML scanner for 2014 was 500 wafers a day, this is definitely big news. Dan called it a “watershed moment” in his LinkedIn post. Of course, we need to see this type of performance to happen longer term like weekly basis, and it needs to be repeated by several leading edge chip makers but this is a sign of good things to come. Congratulations to Dan and his team, ASML and Cymer for significant achievement. We needed this and it looks like this EUVL is finally getting ready for production!
IBM’s NXE3300B scanner, at the EUV Center of Excellence in Albany, recently completed a “40W” EUV light source upgrade. The upgrade resulted in better than projected performance with 44W of EUV light being measured at intermediate focus and confirmed in resist at the wafer level. In the first 24 hours of operation after the upgrade 637 wafer exposures were completed in normal production lot mode with:
– 20 mJ dose
– 83 image fields/wafer (full wafer coverage, including partial die)
– conventional illumination
This is a watershed moment for EUV as it establishes the benchmark capability of the EUV source and scanner to support semiconductor technology node development.
For DUV silylation was apparently a desired part of the process. Is Silylation part of EUV processing?
What does EUVL stand for?????
Extreme Ultra Violet Lithography
Does this mean the effective throughput is still less than 27 WPH?
How dramatically ASML has changed its metric of achievement. Initially the metric was ‘source power’, and the goal for a commercially viable system was ~ 250W EUV. That to permit throughput of something like 3000 wafers per day – they of course were talking about ~125 wafers per hour. Almost like politicians – changing the message to obscure the problem. So, perhaps the achievement is just that it is working at all – but for commercial production viability one has to wonder if they can ever get to the initial specification given the dramatic performance shortfall. The inability to achieve the initially desired source power, coupled to the verbal sleight of hand in terms of metrics now being applied, suggests a fundamental technology problem has arisen – presumably with the LPP drive laser scaling.
Meanwhile, IBM does everything to get rid of its chip making operations. Ironic?
It is good news indeed to hear that IBM in conjunction with ASML has met/exceeded their projected productivity. It is clear to this industry that the EUV LPP source was not meeting the desired schedule and the source improvements timelines were over promised. However this announcement give us some confidence that we are making progress against that schedule. In addition this milestone is significant in that it allows the wafer throughput needed to continue EUVL HVM development. With the throughputs obtained on the scanner and the recent successes from SEMATECH on zero defect mask blanks and low-dose high-resolution resists now is an excellent time to take advantage of the Albany NY based capability to develop the materials and processes that will be needed for EUVL manufacturing. You can discover more about how SEMATECH and our partners are supporting EUVL at http://internal.sematech.org/.
In case you are looking for the Sematech website here is the correct link – http://public.sematech.org/Pages/home.aspx
read this article
The ASML & IBM report is very misleading….
http://archive.constantcontact.com/fs193/1113912258867/archive/1118077703167.html
Right on, Robert! Counting presumably blank wafers as “achievement” shows just how low expectations have become…
This is completely incorrect – wafer were fully printed – including edge die (as stated in the article). It is a real test.
Robert Maire,
You have no clue here, your analogy with a printer printing without ink is completely off. The better analogy would be printing with black ink on a black piece of paper, i.e. it still printed but you could not see it printed.. If the ASML tool did not need to print anything and would just be moving wafer through then the tool they could easily do >100 wph. Instead the tool did what it had to do regardless what is on the wafer. It does an equal amount of wafers per hour with or without resist.
I guess you just hope ASML fails EUV because you said it would fail and dont like to be proven wrong…
Blank wafers in…blank wafers out……nothing printed…no wafers were harmed in the process
I don’t think that moving wafers from the input foup to the output foup counts as “processing” more like “handling”
Nothing was ever mentioned about resolution because nothing was printed on the blank wafers
All it proved was that 637 wafers an be moved in a day much as a 30 year old stepper can….
Imagine that a few years ago HP announced it was developing a new ultra high resolution printer capable of printing 1500 pages an hour with resolution of 10K dots per inch resolution.
Imagine that the printer has been delayed and plagued by technology development issues, with slow progress being made to the point where customers wonder if it will ever work.
Then one day HP and a major customer announce that they successfully ran 637 sheets of paper through the printer in an hour as proof that it was well on its way to being a working printer.
However HP and the customer conveniently leave out the fact in their announcement that the the paper went through the new printer without anything ever being printed on the paper and the paper came out as blank as it went in. In fact some of the blank paper in the output tray was recycled back to the input tray to be run through the printer again coming out blank again.
No toner was used and nothing showed up on the paper yet HP claimed that the new printer achieved a new “milestone”, “watershed” break through rate of 637 pages an hour.
Would you as an investor or analyst view this as an honest and fair representation of progress on the part of HP and its customer or would you find this misleading and deceitful?
Well, that is what happened with IBM and ASML…..
Its unfortunate that both IBM and ASML are that desperate for positive news….
This is incorrect Robert – these wafers were fully printed – including edge die. It is a real result.
Kevin,
if, as you say, “these wafers were fully printed – including edge die. It is a real result”, then:
what’s got printed? CDU? placement? yield?
without these, announcement looks just like another EUV PR stunt.
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Sounds bogus. At 10W they were doing 1 W/h. Now at 40W they can do 600+W/d. You do the math. There must be tons of fine print here.
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Some commentators here are having reading comprehension issues.
“confirmed in resist at the wafer level. “
This is a very basic problem. Resist has a exposure rate efficiency per resolution. The technology simply cannot deliver the power at resolution at the wafer per unit time to meet production rates. Many other thermal, overlay, and nonlinear distortion problems also need to be addresses. What they showed is the transmission works but please pay no attention to the low performance engine.
Stock price says market favorable news in Feb2014. Either they will can EUV or a new, more sensitive resist evolves that can hold up to process,:allow sub 11nm resolution with minimum dose and support dose rate for production throughput. That will assist conventional litho as well. Good luck gentlemen!
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