"Volta is going to solve one of the biggest challenges facing GPUs today, which is access to memory bandwidth," Huang told the attendees.

Personnel Changes in Taiwan

Yole Developpement’s Amandine Pizzagalli has just issued a report "Glass Substrates for Semiconductor manufacturing," where she has examined the potential applications for glass in wafer level packaging and reported on the current and projected market size. A sample of the report can be found here [link]. The functions that were examined include: carriers for thinning in 2.5/3D; capping layers for CMOS image sensors, wafer level optics, structural substrates and wafer level capping.

Twenty-five years after Ronald Regan made his famous demand in Berlin "Tear down this wall," Micron, Samsung and early hybrid memory cube consortium members promised to tear down the memory wall [ see IFTLE 38, "IFTLE 38 of Memory Cubes and IvyBridges – more 3D and TSV"], which was viewed as holding up the progress of future microelectronic products.

Since recent IFTLE reports have indicated that delays in 2.5/3D commercialization have been due to a lack of TSV memory stacks (or at least TSV memory stacks at the right cost point) [see IFTLE 140 "Important Apple Rumors; Xilinx not Deserting 2.5D;Book to Bill Improving"], we thought it was appropriate to take a look at the current status of HMC. Updates on their progress can be found here [link].

ARM, HP, and SK Hynix joined former members including Micron, Samsung, Altera, IBM, Microsoft, AMD, Fujitsu, ST Micro, Marvell and Xilinx in June 2012.

2012 Top 10 Semiconductor Vendors

2012 Materials Market

Semi just reported that the global semiconductor materials market decreased 2 percent in 2012 to $47.11B the first decline in three years. Packaging materials exceeded wafer fabrication materials for the first time ever $23.74B vs $23.38B.

For the third year in a row, Taiwan is the largest consumer of semiconductor materials due to its large foundry and advanced packaging base. Materials markets in China and South Korea also experienced increases. The materials market in Japan contracted 7 percent, with markets also contracting in Europe and North America.

For all the latest on 3DIC and advanced packaging, stay linked to IFTLE.

Last week, GlobalFoundries announced its first functional 20nm silicon wafers with integrated through-silicon vias (TSVs). At its Fab 8 facility in N.Y., the silicon foundry vendor manufactured TSV test wafers using their 20nm-LPM process technology, and at Fab 7 in Singapore, the company demonstrated a 65nm 32mm x 26mm interposer test vehicle for 2.5D chips. Both 2.5D and 3D are set for a 20nm introduction, full qualification by next year and non-early adopter production in 2015.

They are using a 6 x 60 um vias middle, copper TSV  as shown in the figure below. Interposer size is limited by reticle size i.e. 25-30 mm.

Intel Haswell GT3

This past fall [see IFTLE 123: Intel’s Bohr on3DIC] IFTLE reported rumors that Intel would be using TSV stacked DDR4 memory in their Haswell-EX platform for enterprise computing.

Haswell is the codename for the successor to Ivy Bridge architecture. Intel is expected to release 22nm CPUs based on Haswell around June 2013 according to leaked roadmaps. Current rumors have it that the Haswell GT3 will be the introduction point for 2.5D stacking and interposers. Semiaccurate [link] reports that Intel codename "Crystalwell" is not L4 cache on package but rather is GPU memory on an interposer. They indicate that the GT3 variants of Haswell will have 64MB of on-package memory connected through an ultra-wide bus.

Reports were that Haswell needed lower memory power consumption, higher memory bandwidth, and memory capacity that DDR3 could not provide but wide IO TSV based memory stacks could. Based on recent reports from the Semi 3D summit where ST Ericsson’s Kimmich concluded that "although 3D TSV technology appears ready for mass production, wide IO technology is not yet a fit for mainstream smartphones. LPDDR3 and LPDDR4 will be used in this application due to better thermal performance and lower cost."  [see IFTLE 134 “SEMI 3D European Summit – Isthe Wide IO Driver Dead ?”]