By Dr. Phil Garrou, Contributing Editor

Continuing our look at SEMICON Taiwan 2017, we’ll look at some of the papers dealing with laser processing for advanced packaging.

Suss

Habib Hichri examined the reliability of ultra fine line redistribution. Redistribution, developed in the 1990s to facilitate bumping or chips designed for peripheral interconnect, is now indispensable for WLCSP, fan out WLP and Embedded IC packaging.

The claim he best process is a dual damascene process flow creating the trenches and vias by laser ablation as shown below.

 

• Excimer laser ablation patterning does not require photosensitive materials

–allowing wider choice of dielectric materials

• Ablation patterning is performed after cure
• Significant reduction in lithography-related steps

–No photoresist application, develop or strip required

ASE

YE Yeh of ASE described their “Laser Technologies In Advanced Packaging and SiP Process” They offered the following use of lasers for their advanced packaging technologies.

Trumpf Lasers GmbH

Michael Lang of Trumpf Lasers discussed Laser application development for advanced packaging.

Ultra short pulse lasers enable extremely precise, cold ablation of different materials as shown below in the comparison of ns and ps lasers. Typical materials used in Advanced Packaging can be machined without heat-affected zone.

 

Orbotech

Nimrod Bar-Yaakov of Orbotech discussed laser via formation for Advanced Packaging.

They offered the following as key advantages of laser drilling for Advanced Packaging applications:

• Cost and process reduction: Direct material ablation saves photo-litho processes
• “Digital Patterning”: adjusts the drilling pattern according to the actual location of the die
• Same tool and process suites various substrate compositions
• Laser processing tools are panel format ready

They offered the following process flow for PoP laser ablation of TMV:

Pattern-based registration

• Die placement and process variation can cause misalignment between fiducials and pattern
• Using actual pads pattern as registration targets can overcome this issue

They offered further visual evidence that thermal effects are reduced by using short pulsed lasers.

For all the latest in advanced packaging, stay linked to IFTLE…

By Dr. Phil Garrou, Contributing Editor

SEMICON Taiwan

Although threatened by Typhoon Talim, SEMICON Taiwan went forward Sept 13-15 in Taipei. Over the next few weeks IFTLE will be covering Interesting advanced packaging disclosures and topics with relevance to advanced packaging. Our thanks to Semi’s Debra Geiger, Jamie Liao and Grace Wang for linking IFTLE to the relevant materials.

CP Hung of ASE chaired the SiP forum “3D IC, 3D interconnection for AI & High-End Computing” and Albert Lan of Applied Materials chaired the forum “Innovative “Embedded Substrate” and “Fan-Out” Technology to Enable 3D-SiP Devices.”

Let’s first take a look at the embedded and fan-out forum

TechSearch

Jan Vardaman presented the following list of Fan-out WLP suppliers

TechSearch lists the following as why Apple chose this TSMC packaging format for their A10 processor

• Improved electrical and thermal performance of InFO vs. FC-­‐CSP

– InFO PoP Power Noise Reduction and Signal Integrity Improvement

• Thinner than flip chip package (no substrate)

– InFO-­‐PoP is 20% thinner than FC-­‐PoP

– Can enable a low-­‐profile PoP solution as large as 15x15mm

An interesting comparison of Amkor’s SWIFT vs ASE’s FOCoS vs TSMC’s InFO.

Lastly, the TechSearch list of fan-out WLP evolving applications:

• Baseband processors
• Application processors
• RF transceivers, switches, etc.
• Power management integrated circuits (PMIC)
• ConnecDvity modules
• Radar modules (77GHz) for automotive plus other ADAS applications
• Audio CODECs
• Microcontrollers
• Logic + memory for data centers and cloud servers
• Power devices
• Fingerprint sensors

Yole Developpement

Jérôme Azémar of Yole gave their take on “Fan-Out Packaging Technologies and Markets”.

Long time IFTLE readers know that we dislike the term fan out since all packages except fan-in WLP are fan out packages. To add to this Yole has added the following:

Their take on applications is show below plotting package size vs IO count.

Yole sees significant future growth initiated by the Apple adoption of the TSMC InFO package.

For all the latest on advanced packaging, stay linked to IFTLE…

By Dr. Phil Garrou, Contributing Editor

iPhone 8 Teardown

TechInsights has begun their teardown of the iPhone 8. [link]

Pics of the main board are shown below.

 

– The AP (application processor) is in a Package on Package (PoP) with Micron 3GB Mobile LPDDR4 SDRAM.

– The biggest new feature of the AP at announcement is a dedicated “Neural Engine” primarily for Face recognition.

– The video performance is claimed to be the highest quality video capture available in a smartphone. The AP features an Apple-designed video encoder enabling 4K video at 60 fps and Slo-mo 1080p video at 240 fps.

– For we packaging aficionados, the big news is the absence of TSV arrays in their CIS. Preliminary analysis of the die photo suggests to TechInsights that it’s a Sony back-illuminated Exmor RS stacked chip from which they infer that the stack is using hybrid bonding (what Sony licensed from Ziptronix) for the first time in an Apple camera. [see IFTLE “Updating CMOS Image Sensor Technology”]

The SEMI 3D Packaging and Integration Committee

The SEMI International Standards Committee, at their SEMICON West 2017 meeting, approved the transformation of the existing 3D Stacked IC Committee and Assembly & Packaging Committee into a single, unified 3D Packaging and Integration Committee [link] with a charter to:

To explore, evaluate, discuss, and create consensus-based specifications, guidelines, test methods, and practices that, through voluntary compliance, will:

• include the materials, piece parts, and interconnection schemes, and unique packaging assemblies that provide for the communication link between the semiconductor chip and the next level of integration, either single- or multi-chip configurations. It relates to the technologies for heterogeneous and other multi-chip packaging such as Fan-out/Fan-in Wafer Level Packaging, Panel Level Packaging, Three-Dimensional Stacking IC, device embedded packaging, flexible electronics technology
• promote mutual understanding and improved communication between users and suppliers, equipment, automation systems, devices, and services
• enhance the manufacturing efficiency, capability and shorten time-to-market and reduce manufacturing cost

You can get involved with the SEMI International Standards Program at:  www.semi.org/standardsmembership.

Enhanced Semiconductor

NHanced Semiconductors Inc. was launched as a spin-off of Tezzaron Semiconductor in 2016. In the course of developing its advanced 3D memory devices Tezzaron developed technical expertise in ancillary semiconductor technologies.  While Tezzaron will continues to develop and manufacture memory devices with specific focus on its DiRAM4 products, Bob Patti, Bob Patti, past CTO of Tezzaron informed IFTLE that NHanced Semi exists to implement and expand that expertise for process development, prototyping, small volume manufacturing. “We will help determine the optimal packaging solution for customer needs.  If they need custom design work, we can do that; if their design is complete, we’ll assist with 3D or 2.5D enablement.  Sourcing, manufacture, assembly, test – we will handle the entire process from concept to completion”

NHanced Semi has recently completed the purchase of the former Morrisville NC Novati fab, the fab that used to be Ziptronix. Bob indicated that Nhanced will be doing customer R&D development projects and then passing them off to partner Novati to scale and commercialize. Nhanced has replaced tools that Novati had shipped from Morrisville to Austin and their full line in Morrisville should be operational shortly. The 24,000 square foot fabrication Morrisville, NC facility is equipped for rapid prototyping, with a focus on 2.5D and 3D integrated circuit assembly. Current equipment can perform surface prep, bonding, thinning, and pick-place on multiple wafer sizes (100mm to 200mm). NHanced is currently quoting and taking orders for 4Q activity

Speaking of Novati, a recent report from Austin indicates that they have been acquired by start-up Skorpios, a fabless semiconductor manufacturing company producing communications products. [link]

Morris Chang announces retirement

When a wise man speaks it is best to listen. Certainly we must all agree that Morris Chang, the “father of Taiwans chip industry,” who has led TSMC, for 30 some years, is a wise man. Long time IFTLE readers will recall my encounter with Chang in the late 1990’s when I was visiting TSMC introducing materials for bumping. He personally attended this low level meeting telling me “I need to better understand this bumping technology…so teach me”

Well, Morris Chang, 86, has announced that he will retire in June, after having built the world’s biggest foundry chipmaker [link].

Earlier this summer, this wise man was quoted as saying “Packaging can extend physical limits of semiconductors…” [link]

Chang identified the impact of packaging on high-performance computing applications such as AI and deep learning, graphics processors, augmented reality (AR) and virtual reality (VR) applications which he feels will drive future IC market growth.

We are all aware that TSMC has developed a new generation of packaging , its integrated fan-out (InFO) wafer-level packaging (WLP) technology and has recently expanded its chip-on-wafer-on-substrate 2.5D (CoWoS) technology to the fabrication of 16nm chips, and offered second-generation High-Bandwidth Memory (HBM2) and a GPU modules to support artificial intelligence (AI), deep learning and other high-performance computing applications.

When a wise man speaks, it is best to listen!

For all the latest in Advanced Packaging, stay linked to IFTLE…

By Dr. Phil Garrou, Contributing Editor

It is true, as Shakespeare one said, that “A Rose by any other name would smell as sweet” but … in our times, it is important to have an unambiguous name that clearly indicates what you are talking about. Unfortunately, this is not the case for micro LED displays (µLED Displays). There are those for which this term brings to mind a millennial trying to read the Wall Street Journal on his smart watch with a magnifying glass or possibly a display worn by the Astonishing Antman.

The problem obviously is the grammatical issue of what the µ modifies…i.e. a micro (LED display) or a (micro LED) display. While it may be fun to consider how to create a display for the Antman, we will be talking about the latter. IFTLE thought a primer on the subject was in order since this technology has become more and more dependent on interconnect and assembly technologies being supplied by the packaging community.

IFTLE certainly considers this a “futures” technology, meaning still a few years out, but always remember “…the leading edge is where the money is made!”

Comparing the Display Technologies

TFT LCD (thin film transistor liquid crystal displays) were being developed in the 1970s, but by the late 1980s it was publically thought to be way too difficult to yield (“.. you cannot have bad pixels on a TV set”) and certainly a much too expensive a technology to ever displace the cathode ray tubes used for TV and desktop computer displays. Well we all know what happened next and clearly without that technology transformation there would be no laptops or smartphones or smart watches today.

Next on the time line came OLED developed initially by Eastman Kodak in the late 1980s. An organic light-emitting diode (OLED) is a LED in which the emissive layer is a film of organic compound that emits light in response to an electric current. This layer is sandwiched between two electrodes (typically the upper electrode is transparent such as ITO). An OLED display works without a backlight, and is thinner and lighter than a LCD. OLEDs have traditionally been expensive to manufacture and only LG and Samsung made them. Samsung has been working in OLED devices for a decade and is currently using the technology in their smart phones and televisions. Today, the cost has come down dramatically, and now OLED TVs are very affordable. Apple began using OLED displays in its watches in 2015 and in its laptops in 2016.

The term “Micro-LED” was first used by Cree in its US patent “Micro- led arrays with enhanced light extraction” in 2001. The patent describes arrays of interconnected LEDs with individual sizes of less than 30μm.

While there currently are no µLED displays in production, the companies developing the technology believe that it has the potential to challenge OLED and LCDs in the future. Like OLED, it does not require a backlight, producing light in each individual pixel. µLED have the advantage of lower power consumption, higher brightness, ultra-high definition, high color saturation, faster response rate, longer lifetimes and higher efficiencies compared to LCDs and OLEDs.

The three technologies are compared in cross section in the figure below [link]

 

µLEDs were placed onto the industry technology roadmap 2 years ago following Apple’s acquisition of LuxVue, which claimed that its technology was 9x brighter than OLED and LCD. Then Oculus (Facebook) acquired InfiniLED another µLED company which claimed “… a 20 – 40X reduction in power consumption” [link].

In most cases, the µLED chips are manufactured separately then positioned and connected to the transistor matrix via a pick and place process show in the figure below.

Singulation of μLED display chips is typically achieved by bonding the epi wafer to a carrier and plasma etching in the die streets. According to Yole Developpement LEDs as small as 5μm have been demonstrated, but applications requiring >1500 PPI (pixels per inch) might require even smaller sizes.

 

Traditional pick and place equipment cannot pick up such small dies. Such tools typically have throughput around 25,000 places per hour. If large displays are to incorporate millions of tiny LEDs they cannot be assembled by such a method. Thus a requirement for µLED displays is a massively parallel pick and place technology. Players who have developed such technology include Luxvue and X-Celeprint who we have discussed on IFTLE before [see IFTLE 203, “Apple Acquires LuxVue µ-assembly Technology”]

X-Celeprint has developed MEMS-like sacrificial release processes for LED chips. Luxvue uses an electrostatic technology for their massively parallel pick-up, while Xceleprint uses an elastomeric stamp.

The µLED display concept was first validated by Sony in 2012 [link]. Their 55 inch “Crystal LED TV“ which utilized 6MM tiny LEDs (2 million each for red, green, blue subpixels) to reproduce a picture in Full HD resolution. Sony claimed that it had 3.5 times the contrast ratio, 1.4X the color range, and 10X faster response time compared to a traditional LCD.

HVM at costs acceptable to the proposed applications still faces significant engineering and manufacturing challenges. Most expect to see smart watches, being worked on now, as the first application to reach commercialization in the next few years with Apple in the lead. The drivers for this application include battery life and display brightness.

µLED performance and supply chain players are compared below [link].

While it will likely take considerable time, effort and investment to establish an HVM infrastructure, µLED could emerge as an alternative to OLED in the future as LCD fades away.

For all the latest in Advanced packaging, stay linked to IFTLE…