RTI- Architectures for Semiconductor Integration & Packaging (ASIP) is always held in Burlingame, CA at year’s end. It is focused on commercial 3DIC technology and applications and is always a good indicator for the status of the industry.

In the next few blogs we’ll take a look at some key papers from this years conference.

Tezzaron acquires Ziptronix facility outside RTP NC

As we have discussed previously Tezzaron has purchased the former Sematech fabs in Austin and is running the operation as a subsidiary Novati [ see IFTLE 146, “TSMC Apple…Novati” and IFTLE 166 “IEEE 3DIC part 1;….Novati” ]

Timed for release at RTI ASIP was the announcement that Novati had purchased the Ziptronix facility outside RTP NC. Tezzaron had been a licensee of the Ziptronix’s direct bonding technologies, ZiBond™ and DBI® and they now have control of the Ziptronix facility to serve as a second source for their processing [link].

In addition Tezzarons Patti announced that they were partnering with Invensas on 2.5 and 3DIC assembly. [link]

Tezzaron, known for its fine featured TSV showed the following process status and an interesting X section of a W TSV connected at M5.

Suss and EVG

Suss and EVG examined their processes and equipment available for thin film handling of 2.5 & 3DIC wafers, namely temp bonding and debonding.

They are both working with a number of materials suppliers as shown in the Table below. All of them now supply room temp (RT) debonding solutions

Typical thickness requirements for temporary adhesives are dependent on the interface that is being bonded as shown below.

Both Suss and EVG have recently  introduced eximer laser assisted RT debonding which was first introduced by 3M years ago. [ref]

EVG is also touting a laser-initiated debonding process flow.

Brewer has introduced a new UV absorbing release layer which is stable up to 350 ˚C.

Amkor, STATS ChipPAC and ASE to package  Apple A8

DIGITIMES is reporting that Amkor  and STATS ChipPAC will each package  40% of the Apple A8 processor, with the remaining 20% by ASE.[link]

They report that Apple’s A8 chip will be a package-on-package (PoP) SoC solution comprising processors and mobile DRAM in a single package.

(TSMC, which is believed to have landed foundry orders for Apple’s next-generation A8 chip, has reportedly also secured wafer bumping orders for the processor as part of its turnkey solution.  TSMC reportedly will start ramping up production using 20nm process technology for Apple’s A8 chip in the second quarter of 2014.